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Pull requests: llvm/llvm-project
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[WoA] Remove extra barriers after ARM LSE instructions with MSVC backend:AArch64 llvm:codegen
#169596 opened Nov 26, 2025 by UsmanNadeem Loading…
[LowerMemIntrinsics] Optimize memset lowering backend:AMDGPU backend:NVPTX backend:SPIR-V llvm:codegen llvm:globalisel llvm:transforms
#169040 opened Nov 21, 2025 by ritter-x2a Loading…
[ISel] Introduce llvm.clmul intrinsic backend:RISC-V llvm:codegen llvm:ir llvm:SelectionDAG SelectionDAGISel as well
#168731 opened Nov 19, 2025 by artagnon Loading…
CodeGen: Add LibcallLoweringInfo analysis pass backend:AArch64 backend:AMDGPU backend:loongarch backend:PowerPC backend:RISC-V backend:SPIR-V backend:X86 clang:codegen IR generation bugs: mangling, exceptions, etc. clang Clang issues not falling into any other category llvm:analysis Includes value tracking, cost tables and constant folding llvm:codegen llvm:transforms
#168622 opened Nov 18, 2025 by arsenm Loading…
[InterleavedAccess] Construct interleaved access store with shuffles backend:AArch64 llvm:codegen llvm:transforms
#167737 opened Nov 12, 2025 by ram-NK Loading…
[llvm][DebugInfo] Allow DIDerivedType as a bound in DISubrangeType debuginfo llvm:codegen llvm:ir
#165880 opened Oct 31, 2025 by tromey Loading…
[RFC][LLVM] Emit dwarf data for changed-signature and new functions debuginfo llvm:codegen llvm:transforms
#165310 opened Oct 27, 2025 by yonghong-song Loading…
[RegisterCoalescer] Improve register allocation for return values by limiting rematerialization backend:AArch64 backend:AMDGPU backend:ARM backend:loongarch backend:MIPS backend:PowerPC backend:RISC-V backend:X86 clang Clang issues not falling into any other category debuginfo llvm:codegen llvm:regalloc
#163047 opened Oct 12, 2025 by rez5427 Loading…
Put large common blocks into .lbss for the medium and large code models backend:X86 llvm:binary-utilities llvm:codegen llvm:mc Machine (object) code
#161483 opened Oct 1, 2025 by ssijaric-nv Loading…
CodeGen: Introduce MachineFunction::getPreferredAlignment(). backend:PowerPC backend:X86 llvm:codegen
#158368 opened Sep 12, 2025 by pcc Loading…
[LLVM] Insert IMPLICIT_DEF for a register sequence if any operand is undef backend:AMDGPU llvm:codegen llvm:regalloc
#158000 opened Sep 11, 2025 by abhigargrepo Loading…
CodeGen: Emit .prefalign directives based on the prefalign attribute. backend:PowerPC backend:X86 lld:ELF lld llvm:codegen llvm:transforms PGO Profile Guided Optimizations
#155529 opened Aug 27, 2025 by pcc Loading…
[GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) backend:AArch64 backend:AMDGPU llvm:codegen llvm:globalisel llvm:SelectionDAG SelectionDAGISel as well tablegen
#155107 opened Aug 23, 2025 by DenisGZM Loading…
[AIX] Implement the ifunc attribute. backend:PowerPC clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' clang:frontend Language frontend issues, e.g. anything involving "Sema" clang Clang issues not falling into any other category compiler-rt:builtins compiler-rt llvm:codegen llvm:ir llvm:transforms
#153049 opened Aug 11, 2025 by w2yehia Loading…
[AMDGPU]: Do not provide AGPR for AV if !mayNeedAGPRs backend:AMDGPU llvm:codegen llvm:regalloc
#151063 opened Jul 29, 2025 by jrbyrnes Loading…
[CGP] Reassociate GEPs to separate scalar and vector indexing llvm:codegen llvm:transforms
#146379 opened Jun 30, 2025 by preames Loading…
[BranchFolding] Fold fallthroughs into conditional tailcalls if profitable backend:X86 llvm:codegen
#140476 opened May 18, 2025 by omern1 Loading…
[Codegen] Remove redundant instruction using machinelateCleanup backend:AArch64 backend:AMDGPU backend:X86 llvm:codegen
#139716 opened May 13, 2025 by rohitaggarwal007 Loading…
[CodeGen] Port gc-empty-basic-blocks to new pass manager backend:X86 llvm:codegen
#137585 opened Apr 28, 2025 by paperchalice Loading…
[SystemZ] Add a SystemZ specific pre-RA scheduling strategy. backend:SystemZ llvm:codegen llvm:regalloc
#135076 opened Apr 9, 2025 by JonPsson1 Loading…
Add pointer field protection feature. backend:AArch64 clang:codegen IR generation bugs: mangling, exceptions, etc. clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' clang:frontend Language frontend issues, e.g. anything involving "Sema" clang Clang issues not falling into any other category libc++abi libc++abi C++ Runtime Library. Not libc++. libc++ libc++ C++ Standard Library. Not GNU libstdc++. Not libc++abi. llvm:analysis Includes value tracking, cost tables and constant folding llvm:codegen llvm:instcombine Covers the InstCombine, InstSimplify and AggressiveInstCombine passes llvm:ir llvm:transforms
#133538 opened Mar 28, 2025 by pcc Loading…
[Draft] Support save/restore point splitting in shrink-wrap backend:AArch64 backend:AMDGPU backend:ARM backend:Hexagon backend:NVPTX backend:PowerPC backend:RISC-V backend:WebAssembly backend:X86 debuginfo llvm:codegen llvm:globalisel tools:llvm-reduce
#119359 opened Dec 10, 2024 by enoskova-sc Loading…
[CodeGen][NewPM] Port
AsmPrinter to new pass manager backend:AMDGPU backend:NVPTX backend:PowerPC backend:X86 llvm:codegen #99320 opened Jul 17, 2024 by paperchalice Loading…
[AArch64] Lower EH_RETURN backend:AArch64 llvm:codegen
#76775 opened Jan 3, 2024 by SihangZhu Loading…
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