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Pull requests list

[Draft] Support save/restore point splitting in shrink-wrap backend:AArch64 backend:AMDGPU backend:ARM backend:Hexagon backend:NVPTX backend:PowerPC backend:RISC-V backend:WebAssembly backend:X86 debuginfo llvm:codegen llvm:globalisel tools:llvm-reduce
#119359 opened Dec 10, 2024 by enoskova-sc Loading… updated Dec 1, 2025
21
[AArch64][ARM] Optimize more tbl/tbx calls into shufflevector backend:AArch64 backend:ARM llvm:instcombine Covers the InstCombine, InstSimplify and AggressiveInstCombine passes llvm:transforms
#169748 opened Nov 26, 2025 by valadaptive Loading… updated Dec 1, 2025
1
5
[clang][DebugInfo] Add virtual call-site target information in DWARF. backend:AArch64 backend:ARM backend:MIPS backend:RISC-V backend:X86 clang:codegen IR generation bugs: mangling, exceptions, etc. clang Clang issues not falling into any other category debuginfo lldb llvm:binary-utilities llvm:codegen llvm:ir
#167666 opened Nov 12, 2025 by CarlosAlbertoEnciso Loading… updated Dec 1, 2025
@CarlosAlbertoEnciso
45
[ARM] Introduce intrinsics for MVE minnm/maxnm under strict-fp. backend:ARM clang:frontend Language frontend issues, e.g. anything involving "Sema" llvm:ir
#169795 opened Nov 27, 2025 by davemgreen Loading… updated Dec 1, 2025
4
[TTI] Remove masked/gather-scatter/strided/expand-compress costing from TTIImpl backend:AArch64 backend:ARM backend:Hexagon backend:RISC-V backend:X86 llvm:analysis Includes value tracking, cost tables and constant folding
#169885 opened Nov 28, 2025 by arcbbb Loading… updated Dec 1, 2025
4
[ARM] Introduce intrinsics for MVE vcmp under strict-fp. backend:ARM clang:frontend Language frontend issues, e.g. anything involving "Sema" llvm:ir
#169798 opened Nov 27, 2025 by davemgreen Loading… updated Nov 30, 2025
2
[TTI] Use MemIntrinsicCostAttributes for getGatherScatterOpCost backend:AArch64 backend:ARM backend:Hexagon backend:RISC-V backend:X86 llvm:analysis Includes value tracking, cost tables and constant folding llvm:transforms vectorizers
#168650 opened Nov 19, 2025 by arcbbb Loading… updated Nov 28, 2025
12
[RegisterCoalescer] Improve register allocation for return values by limiting rematerialization backend:AArch64 backend:AMDGPU backend:ARM backend:loongarch backend:MIPS backend:PowerPC backend:RISC-V backend:X86 clang Clang issues not falling into any other category debuginfo llvm:codegen llvm:regalloc
#163047 opened Oct 12, 2025 by rez5427 Loading… updated Nov 25, 2025
32
[RISCV] Add optimization for memset inline backend:AArch64 backend:AMDGPU backend:ARM backend:Hexagon backend:MIPS backend:PowerPC backend:RISC-V backend:SystemZ backend:X86 llvm:SelectionDAG SelectionDAGISel as well
#146673 opened Jul 2, 2025 by BoyaoWang430 Loading… updated Nov 25, 2025
16
Reland "[DebugMetadata][DwarfDebug] Support function-local types in lexical block scopes (4/7)" backend:ARM backend:X86 clang:codegen IR generation bugs: mangling, exceptions, etc. clang:static analyzer clang Clang issues not falling into any other category debuginfo llvm:codegen llvm:ir llvm:transforms
#165032 opened Oct 24, 2025 by dzhidzhoev Loading… updated Nov 21, 2025
@dzhidzhoev
20
[SelectionDAG] Optimize BSWAP yet again once more backend:ARM llvm:SelectionDAG SelectionDAGISel as well
#165292 opened Oct 27, 2025 by AZero13 Loading… updated Nov 17, 2025
12
[SelectionDAG] Fix bug related to demanded bits/elts for BITCAST backend:AArch64 backend:AMDGPU backend:ARM backend:X86 llvm:SelectionDAG SelectionDAGISel as well
#145902 opened Jun 26, 2025 by bjope Loading… updated Nov 12, 2025
4
DAG: Handle load in SimplifyDemandedVectorElts backend:AArch64 backend:AMDGPU backend:ARM backend:loongarch backend:MIPS backend:NVPTX backend:PowerPC backend:RISC-V backend:X86 llvm:SelectionDAG SelectionDAGISel as well
#122671 opened Jan 13, 2025 by arsenm Loading… updated Nov 12, 2025
9
[ARM] Create ConvertToComparesPass backend:ARM
#155530 opened Aug 27, 2025 by AZero13 Loading… updated Oct 16, 2025
20
[Android] Drop workarounds for older Android API levels pre 23 backend:ARM backend:X86 clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' clang Clang issues not falling into any other category compiler-rt:sanitizer llvm:ir llvm:transforms
#161893 opened Oct 3, 2025 by brad0 Loading… updated Oct 10, 2025
11
[DAGCombiner] Set shift flags during visit. backend:AArch64 backend:AMDGPU backend:ARM backend:loongarch backend:PowerPC backend:RISC-V backend:SystemZ backend:WebAssembly backend:X86 llvm:SelectionDAG SelectionDAGISel as well
#91239 opened May 6, 2024 by goldsteinn • Draft updated Oct 2, 2025
17
[SelectionDAG] Use Magic Algorithm for Splitting UDIV/UREM by Constant backend:AArch64 backend:ARM backend:MIPS backend:PowerPC backend:RISC-V backend:X86 llvm:SelectionDAG SelectionDAGISel as well
#154968 opened Aug 22, 2025 by mskamp Loading… updated Sep 29, 2025
1
15
Enable machine combiner pass for ARM backend:ARM
#159466 opened Sep 17, 2025 by AZero13 Loading… updated Sep 18, 2025
2
[ARM] Custom Lowering for SADDO_CARRY and SSUBO_CARRY backend:ARM
#154419 opened Aug 19, 2025 by AZero13 Loading… updated Sep 14, 2025
3
[LoopStrengthReduce] Encourage the creation of IVs whose increment can later be combined with memory instuctions backend:AArch64 backend:ARM llvm:transforms
#152995 opened Aug 11, 2025 by SergeyShch01 Loading… updated Sep 3, 2025
4
[LoopStrengthReduce] Mitigation of issues introduced by compilation time optimization in SolveRecurse. backend:AArch64 backend:AMDGPU backend:ARM backend:NVPTX backend:PowerPC backend:RISC-V backend:WebAssembly backend:X86 llvm:transforms slow-compile
#147588 opened Jul 8, 2025 by SergeyShch01 Loading… updated Aug 19, 2025
30
[llvm] Change fp128 lowering to use f128 functions by default backend:AArch64 backend:ARM backend:Hexagon backend:MIPS backend:PowerPC backend:SystemZ backend:WebAssembly backend:X86 clang:codegen IR generation bugs: mangling, exceptions, etc. clang Clang issues not falling into any other category llvm:adt llvm:analysis Includes value tracking, cost tables and constant folding llvm:ir llvm:SelectionDAG SelectionDAGISel as well llvm:support
#76558 opened Dec 29, 2023 by tgross35 Loading… updated Jul 22, 2025
1
28
[LLVM][SelectionDAG] Don't legalise splat constants until required. backend:AArch64 backend:ARM backend:X86 llvm:SelectionDAG SelectionDAGISel as well
#143571 opened Jun 10, 2025 by paulwalker-arm • Draft updated Jun 17, 2025
12
[CMake] Move common target dependencies into ${TARGET_LIBRARIES} backend:AArch64 backend:AMDGPU backend:ARC backend:ARM backend:CSKY backend:DirectX backend:Hexagon backend:Lanai backend:loongarch backend:m68k backend:MSP430 backend:NVPTX backend:PowerPC backend:Sparc backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86
#141271 opened May 23, 2025 by CBSears Loading… updated May 27, 2025
10
[WIP][CodeGen] Modifying MBB's liveins representation as into regUnits backend:AArch64 backend:AMDGPU backend:ARM backend:Hexagon backend:m68k backend:X86 llvm:codegen llvm:globalisel llvm:regalloc tools:llvm-exegesis
#129847 opened Mar 5, 2025 by vg0204 Loading… updated May 26, 2025
@vg0204
79
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