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[DAGCombine] Propagate truncate to operands backend:AMDGPU backend:NVPTX backend:X86 help wanted Indicates that a maintainer wants help. Not [good first issue]. llvm:SelectionDAG SelectionDAGISel as well
#98666 by justinfargnoli was closed Dec 1, 2025 Loading… updated Dec 1, 2025
[DAG] Rewrite demorgan rule for ANDN backend:X86 llvm:SelectionDAG SelectionDAGISel as well
#163789 by kper was closed Nov 21, 2025 Loading… updated Nov 21, 2025
[HLSL] Added new wave intrinsics and memory barriers backend:X86 clang:headers Headers provided by Clang, e.g. for intrinsics clang Clang issues not falling into any other category
#163971 by KungFuDonkey was closed Oct 20, 2025 Loading… updated Oct 20, 2025
[Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - allow AVX/AVX512 subvector extraction intrinsics to be used in constexpr #157712 backend:X86 clang:bytecode Issues for the clang bytecode constexpr interpreter clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:headers Headers provided by Clang, e.g. for intrinsics clang Clang issues not falling into any other category
#162836 by SeongjaeP was merged Oct 20, 2025 Loading… updated Oct 20, 2025
[CodeGen] Use getObjectPtrOffset to generate loads/stores for mem intrinsics backend:AArch64 backend:AMDGPU backend:BPF backend:PowerPC backend:WebAssembly backend:X86 llvm:optimizations llvm:SelectionDAG SelectionDAGISel as well
#80184 by dschuff was merged Oct 14, 2025 Loading… updated Oct 14, 2025
[clang] Make vector cast intrinsics constexpr backend:X86 clang:headers Headers provided by Clang, e.g. for intrinsics clang Clang issues not falling into any other category
#156381 by vedantjk was closed Oct 7, 2025 Loading… updated Oct 7, 2025
[X86] Create special case for (a-b) - (a<b) -> sbb a, b backend:X86
#161388 by AZero13 was merged Oct 2, 2025 Loading… updated Oct 2, 2025
[X86][GlobalISel] Added support for llvm.set.rounding backend:AArch64 backend:RISC-V backend:X86 llvm:globalisel llvm:support
#156591 by JaydeepChauhan14 was merged Sep 25, 2025 Loading… updated Sep 26, 2025
[X86] X86TargetLowering::computeKnownBitsForTargetNode - add X86ISD::VPMADD52L\H handling backend:X86
#156349 by houngkoungting was closed Sep 17, 2025 Loading… updated Sep 17, 2025
[SelectionDAG] fold (not (sub Y, X)) -> (add X, ~Y) backend:PowerPC backend:X86 llvm:SelectionDAG SelectionDAGISel as well
#147825 by AZero13 was closed Sep 8, 2025 Loading… updated Sep 8, 2025
[X86] Update BMI, BMI2 and TBM constexpr tests backend:X86 clang Clang issues not falling into any other category
#156260 by ghost was closed Sep 1, 2025 Loading… updated Sep 1, 2025
[DAGCombine][RISCV] fold select_cc seteq (and x, 1) 0, 0, -1 -> neg(and(x, 1)) backend:RISC-V backend:X86 llvm:SelectionDAG SelectionDAGISel as well
#152062 by AZero13 was closed Aug 12, 2025 Loading… updated Aug 12, 2025
[HLSL][DXIL] Implement IR generation bugs: mangling, exceptions, etc. clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:headers Headers provided by Clang, e.g. for intrinsics clang Clang issues not falling into any other category HLSL HLSL Language Support llvm:ir
refract intrinsic backend:SPIR-V backend:X86 clang:codegen #136026 by AnaghaRaoAMD was closed Jul 3, 2025 Loading… updated Jul 3, 2025
12 tasks done
[X86] Truncate i64 add/sub/mul arithmetic to i32 with known zeros in higher bits backend:X86
#143313 by omkar-mohanty was closed Jun 11, 2025 Loading… updated Jun 11, 2025
[SelectionDAG] Split vector types for atomic load backend:X86 llvm:SelectionDAG SelectionDAGISel as well
#120640 by jofrn was closed Jun 1, 2025 Loading… updated Jun 1, 2025
[Clang][OpenCL][AMDGPU] Allow a kernel to call another kernel backend:AMDGPU backend:X86 clang:codegen IR generation bugs: mangling, exceptions, etc. clang:frontend Language frontend issues, e.g. anything involving "Sema" clang Clang issues not falling into any other category
#115821 by lalaniket8 was merged Apr 8, 2025 Loading… updated May 29, 2025
[X86][DAGCombiner][SelectionDAG] - Fold Zext Build Vector to Bitcast of widen Build Vector backend:PowerPC backend:SystemZ backend:WebAssembly backend:X86 llvm:SelectionDAG SelectionDAGISel as well
#135010 by rohitaggarwal007 was merged May 6, 2025 Loading… updated May 6, 2025
[Support] report_fatal_error: Do not generate crash backtrace by default backend:AArch64 backend:AMDGPU backend:ARM backend:Hexagon backend:NVPTX backend:PowerPC backend:SystemZ backend:WebAssembly backend:X86 debuginfo llvm:binary-utilities llvm:globalisel llvm:mc Machine (object) code llvm:support llvm:transforms LTO Link time optimization (regular/full LTO or ThinLTO)
[SPIRV] GPU intrinsics backend:AMDGPU backend:NVPTX backend:SPIR-V backend:X86 clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:headers Headers provided by Clang, e.g. for intrinsics clang Clang issues not falling into any other category llvm:ir llvm:transforms
#131190 by JonChesterfield was closed Mar 17, 2025 Loading… updated Mar 17, 2025
[X86] Correct Zen4 Scheduling References and Mismatches backend:X86
#128030 by bubblepipe was closed Mar 17, 2025 Loading… updated Mar 17, 2025
[SelectionDAG] Add more cases for UDIV and SDIV backend:X86 llvm:analysis Includes value tracking, cost tables and constant folding llvm:SelectionDAG SelectionDAGISel as well llvm:support
#86452 by AZero13 was closed Mar 6, 2025 Loading… updated Mar 6, 2025
[DAG] isKnownNeverZero - add more cases for UDIV, SDIV, SRA, and SRL operations backend:X86 llvm:SelectionDAG SelectionDAGISel as well llvm:support
#89522 by AZero13 was closed Mar 6, 2025 Loading… updated Mar 6, 2025
[SDAG][X86] Remove hack needed to avoid missing x87 FPU stack pops backend:AArch64 backend:ARM backend:PowerPC backend:X86 llvm:globalisel llvm:SelectionDAG SelectionDAGISel as well llvm:support
#128055 by MacDue was merged Mar 3, 2025 Loading… updated Mar 3, 2025
Adding splitdouble HLSL function backend:DirectX backend:X86 clang:codegen IR generation bugs: mangling, exceptions, etc. clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:headers Headers provided by Clang, e.g. for intrinsics clang Clang issues not falling into any other category HLSL HLSL Language Support llvm:ir
#109331 by joaosaffran was merged Oct 28, 2024 Loading… updated Feb 26, 2025
X86: Fix convertToThreeAddress losing subregister indexes backend:X86
#124098 by arsenm was merged Feb 18, 2025 Loading… updated Feb 18, 2025
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