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[SelectionDAG] fold (not (sub Y, X)) -> (add X, ~Y) backend:PowerPC backend:X86 llvm:SelectionDAG SelectionDAGISel as well
#147825 by AZero13 was closed Sep 8, 2025 Loading…
[PowerPC] eliminate RLWINM instruction following LBARX as possible backend:PowerPC
#144089 by diggerlin was merged Jun 25, 2025 Loading…
[libc] Special case PPC double double for print backend:PowerPC libc
#136614 by jhuber6 was merged Apr 23, 2025 Loading…
[X86][DAGCombiner][SelectionDAG] - Fold Zext Build Vector to Bitcast of widen Build Vector backend:PowerPC backend:SystemZ backend:WebAssembly backend:X86 llvm:SelectionDAG SelectionDAGISel as well
#135010 by rohitaggarwal007 was merged May 6, 2025 Loading…
[Support] report_fatal_error: Do not generate crash backtrace by default backend:AArch64 backend:AMDGPU backend:ARM backend:Hexagon backend:NVPTX backend:PowerPC backend:SystemZ backend:WebAssembly backend:X86 debuginfo llvm:binary-utilities llvm:globalisel llvm:mc Machine (object) code llvm:support llvm:transforms LTO Link time optimization (regular/full LTO or ThinLTO)
[SDAG][X86] Remove hack needed to avoid missing x87 FPU stack pops backend:AArch64 backend:ARM backend:PowerPC backend:X86 llvm:globalisel llvm:SelectionDAG SelectionDAGISel as well llvm:support
#128055 by MacDue was merged Mar 3, 2025 Loading…
[clang][CodeGen] Emit IR generation bugs: mangling, exceptions, etc. clang:openmp OpenMP related changes to Clang clang Clang issues not falling into any other category llvm:analysis Includes value tracking, cost tables and constant folding llvm:instcombine Covers the InstCombine, InstSimplify and AggressiveInstCombine passes llvm:ir llvm:transforms LTO Link time optimization (regular/full LTO or ThinLTO)
llvm.tbaa.errno metadata during module creation backend:AMDGPU backend:PowerPC backend:RISC-V backend:SystemZ clang:codegen #125258 by antoniofrighetto was merged Oct 21, 2025 Loading…
Revert "[IR] Don't include Module.h in Analysis.h (NFC) (#97023)" backend:AArch64 backend:AMDGPU backend:ARM backend:PowerPC backend:RISC-V backend:SystemZ backend:WebAssembly backend:X86 clang:frontend Language frontend issues, e.g. anything involving "Sema" clang Clang issues not falling into any other category debuginfo llvm:analysis Includes value tracking, cost tables and constant folding llvm:ir llvm:SelectionDAG SelectionDAGISel as well llvm:transforms LTO Link time optimization (regular/full LTO or ThinLTO) mlgo PGO Profile Guided Optimizations
#97129 by ZijunZhaoCCK was closed Jun 30, 2024 Loading…
[X86,SimplifyCFG] Support hoisting load/store with conditional faulting (Part I) backend:AArch64 backend:AMDGPU backend:ARM backend:loongarch backend:PowerPC backend:X86 llvm:transforms
#96878 by KanRobert was merged Aug 29, 2024 Loading…
Add diagnostic help for inline asm operand constraint 'H' backend:AArch64 backend:AMDGPU backend:ARM backend:loongarch backend:m68k backend:MSP430 backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 llvm:ir
#88248 by mahesh-attarde was closed May 3, 2024 Loading…
[SelectionDAG] Fix D66309: Allow unordered atomics to have some optimizations done for them backend:PowerPC llvm:SelectionDAG SelectionDAGISel as well
#85589 by AZero13 was closed Jul 10, 2024 Loading…
[CodeGen] Use getObjectPtrOffset to generate loads/stores for mem intrinsics backend:AArch64 backend:AMDGPU backend:BPF backend:PowerPC backend:WebAssembly backend:X86 llvm:optimizations llvm:SelectionDAG SelectionDAGISel as well
#80184 by dschuff was merged Oct 14, 2025 Loading…
[Driver][LTO] Move common code for LTO to addLTOOptions() backend:AMDGPU backend:PowerPC clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' clang Clang issues not falling into any other category
#74178 by brad0 was merged May 24, 2025 Loading…
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