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Pull requests: llvm/llvm-project
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[ValueTracking] Enhance alignment propagation in computeKnownBits. backend:AMDGPU backend:PowerPC backend:RISC-V backend:SystemZ clang Clang issues not falling into any other category coroutines C++20 coroutines llvm:analysis Includes value tracking, cost tables and constant folding llvm:globalisel llvm:instcombine Covers the InstCombine, InstSimplify and AggressiveInstCombine passes llvm:transforms
#166935 opened Nov 7, 2025 by egorshamshura Loading… updated Dec 1, 2025
[Draft] Support save/restore point splitting in shrink-wrap backend:AArch64 backend:AMDGPU backend:ARM backend:Hexagon backend:NVPTX backend:PowerPC backend:RISC-V backend:WebAssembly backend:X86 debuginfo llvm:codegen llvm:globalisel tools:llvm-reduce
#119359 opened Dec 10, 2024 by enoskova-sc Loading… updated Dec 1, 2025
[IR] Add CallBr intrinsics support backend:AMDGPU llvm:globalisel llvm:ir llvm:SelectionDAG SelectionDAGISel as well llvm:support llvm:transforms
#133907 opened Apr 1, 2025 by ro-i Loading… updated Dec 1, 2025
AMDGPU/GlobalISel: Report RegBankLegalize errors using reportGISelFailure backend:AMDGPU
#169918 opened Nov 28, 2025 by petar-avramovic Loading… updated Dec 1, 2025
[AMDGPU][Scheduler] Scoring system for rematerialization candidates backend:AMDGPU llvm:globalisel
#153092 opened Aug 11, 2025 by lucas-rami Loading… updated Dec 1, 2025
[SPIRV] Use AMDGPU ABI for AMDGCN flavoured SPIRV backend:AMDGPU backend:SPIR-V clang:codegen IR generation bugs: mangling, exceptions, etc.
#169865 opened Nov 28, 2025 by AlexVlx Loading… updated Dec 1, 2025
[AMDGPU] Emit amdgpu.max_num_named_barrier resource symbol backend:AMDGPU
#169851 opened Nov 27, 2025 by PMylon Loading… updated Dec 1, 2025
[AMDGPU] Rematerialize VGPR candidates when SGPR spills results in VGPR Excess backend:AMDGPU
#168079 opened Nov 14, 2025 by jmmartinez Loading… updated Dec 1, 2025
[AMDGPU] Make SIShrinkInstructions pass return valid changed state backend:AMDGPU
#168833 opened Nov 20, 2025 by vikramRH Loading… updated Dec 1, 2025
[AMDGPU] Verify dominance when rewriting spills to registers backend:AMDGPU
#167347 opened Nov 10, 2025 by kerbowa Loading… updated Dec 1, 2025
[AMDGPU] Add scheduling DAG mutation for hazard latencies backend:AMDGPU llvm:globalisel
#170075 opened Dec 1, 2025 by perlfu Loading… updated Dec 1, 2025
[NPM] Schedule PhysicalRegisterUsageAnalysis before RegUsageInfoCollectorPass backend:AMDGPU
#168832 opened Nov 20, 2025 by vikramRH Loading… updated Dec 1, 2025
[AMDGPU][NPM] Enable SIModeRegister and SIInsertHardclauses passes backend:AMDGPU
#168831 opened Nov 20, 2025 by vikramRH Loading… updated Dec 1, 2025
[PHIElimination] Declare MachineLoopInfo dependency for Legacy PM backend:AMDGPU llvm:codegen llvm:regalloc
#169693 opened Nov 26, 2025 by PrasoonMishra Loading… updated Dec 1, 2025
[AMDGPU] Apply alignment attr for make.buffer.rsrc backend:AMDGPU clang Clang issues not falling into any other category llvm:transforms
#166914 opened Nov 7, 2025 by Shoreshen Loading… updated Dec 1, 2025
[AMDGPU] Generate waterfall for calls with SGPR(inreg) argument backend:AMDGPU
#146997 opened Jul 4, 2025 by Shoreshen Loading… updated Dec 1, 2025
[LoadStoreVectorizer] Allow redundant stores backend:AMDGPU llvm:globalisel llvm:transforms vectorizers
#169946 opened Nov 28, 2025 by cmc-rep Loading… updated Nov 30, 2025
[SLP] Loop aware cost model/tree building backend:AMDGPU backend:RISC-V backend:SystemZ llvm:transforms vectorizers
#150450 opened Jul 24, 2025 by alexey-bataev Loading… updated Nov 30, 2025
[mlir][AMDGPU] Add scaled wmma ops for gfx1250 backend:AMDGPU mlir:amdgpu mlir:gpu mlir
#169854 opened Nov 27, 2025 by justinrosner Loading… updated Nov 30, 2025
Reland "Redesign Straight-Line Strength Reduction (SLSR) (#162930)" backend:AMDGPU backend:NVPTX llvm:transforms
#169614 opened Nov 26, 2025 by fiigii Loading… updated Nov 29, 2025
[AMDGPU][GISel] Add RegBankLegalize support for G_STRICT_{FADD|FMUL} backend:AMDGPU llvm:globalisel
#169406 opened Nov 24, 2025 by chinmaydd Loading… updated Nov 29, 2025
[AMDGPU] Introduce Next-Use Analysis for SSA-based Register Allocation backend:AMDGPU llvm:regalloc
#156079 opened Aug 29, 2025 by alex-t Loading… updated Nov 28, 2025
[mlir][amdgpu] Add lowering for make_dma_descriptor backend:AMDGPU mlir:amdgpu mlir:gpu mlir
#169955 opened Nov 28, 2025 by amd-eochoalo Loading… updated Nov 28, 2025
AMDGPU/GlobalISel: Report RegBankLegalize errors using reportGISelFailure backend:AMDGPU llvm:globalisel
#169511 opened Nov 25, 2025 by petar-avramovic Loading… updated Nov 28, 2025
[AMDGPU][SIInsertWaitCnts] Use RegUnits-based tracking backend:AMDGPU
#162077 opened Oct 6, 2025 by Pierre-vh Loading… updated Nov 28, 2025
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