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Pull requests: llvm/llvm-project
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[VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. backend:RISC-V backend:SystemZ llvm:transforms vectorizers
#170053 opened Nov 30, 2025 by fhahn Loading…
[SystemZ] Handle IR struct arguments correctly. backend:SystemZ
#169583 opened Nov 26, 2025 by JonPsson1 Loading…
[SystemZ] Global Stackprotector and associated location section backend:SystemZ clang:codegen IR generation bugs: mangling, exceptions, etc. clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' clang:frontend Language frontend issues, e.g. anything involving "Sema"
#169317 opened Nov 24, 2025 by dominik-steenken Loading…
[RegisterCoalescer] Don't commute two-address instructions which only define a subregister backend:SystemZ backend:X86 llvm:codegen llvm:regalloc
#169031 opened Nov 21, 2025 by KRM7 Loading…
[GOFF] Write out relocations in the GOFF writer backend:SystemZ llvm:binary-utilities llvm:mc Machine (object) code
#167054 opened Nov 7, 2025 by redstar Loading…
[ValueTracking] Enhance alignment propagation in computeKnownBits. backend:AMDGPU backend:PowerPC backend:RISC-V backend:SystemZ clang Clang issues not falling into any other category coroutines C++20 coroutines llvm:analysis Includes value tracking, cost tables and constant folding llvm:globalisel llvm:instcombine Covers the InstCombine, InstSimplify and AggressiveInstCombine passes llvm:transforms
#166935 opened Nov 7, 2025 by egorshamshura Loading…
[HLSL][SPIR-V] Implement vk::push_constant backend:AArch64 backend:AMDGPU backend:DirectX backend:SPIR-V backend:SystemZ backend:WebAssembly clang:codegen IR generation bugs: mangling, exceptions, etc. clang:frontend Language frontend issues, e.g. anything involving "Sema" clang Clang issues not falling into any other category HLSL HLSL Language Support
#166793 opened Nov 6, 2025 by Keenuts Loading…
[DAG] SimplifyDemandedBits - ICMP_SLT(X,0) - only sign mask of X is required backend:AArch64 backend:AMDGPU backend:loongarch backend:RISC-V backend:SystemZ backend:X86 llvm:SelectionDAG SelectionDAGISel as well
#164946 opened Oct 24, 2025 by an1k3sh Loading…
SystemZ: Remove override of insertSSPDeclarations backend:SystemZ
#163708 opened Oct 16, 2025 by arsenm Loading…
[FPEnv][SDAG] Implement FNEARBYINT with optional chain backend:AArch64 backend:PowerPC backend:RISC-V backend:SystemZ backend:X86 llvm:codegen llvm:ir llvm:SelectionDAG SelectionDAGISel as well
#163081 opened Oct 12, 2025 by spavloff Loading…
[DAGCombiner][X86] Push bitcast/ext through freeze for loads backend:AArch64 backend:AMDGPU backend:RISC-V backend:SystemZ backend:X86 llvm:SelectionDAG SelectionDAGISel as well
#163070 opened Oct 12, 2025 by guy-david Loading…
[CodeGen] expand-fp: Change frem expansion criterion backend:AArch64 backend:AMDGPU backend:ARM backend:CSKY backend:Hexagon backend:loongarch backend:MIPS backend:PowerPC backend:RISC-V backend:SystemZ backend:VE backend:WebAssembly backend:X86 backend:Xtensa llvm:codegen
#158285 opened Sep 12, 2025 by frederik-h Loading…
[SLP] Prefer copyable vectorization over alternate opcodes backend:RISC-V backend:SystemZ llvm:transforms vectorizers
#153684 opened Aug 14, 2025 by alexey-bataev Loading…
[SystemZ] Support all instruction formats with Machine (object) code
.insn directive backend:SystemZ llvm:mc #152667 opened Aug 8, 2025 by dominik-steenken Loading…
[SLP]Initial support for non-power-of-2 vectorization backend:RISC-V backend:SystemZ llvm:transforms vectorizers
#151530 opened Jul 31, 2025 by alexey-bataev Loading…
[SLP] Loop aware cost model/tree building backend:AMDGPU backend:RISC-V backend:SystemZ llvm:transforms vectorizers
#150450 opened Jul 24, 2025 by alexey-bataev Loading…
[AArch64] Enable preferZeroCompareBranch for AArch64 when we don't have fused cmp+br backend:AArch64 backend:ARM backend:RISC-V backend:SystemZ llvm:codegen
#150045 opened Jul 22, 2025 by AZero13 Loading…
[CodeGen] Change the type from int64_t to uint64_t for getObjectSize and setObjectSize backend:SystemZ llvm:codegen llvm:SelectionDAG SelectionDAGISel as well
#149251 opened Jul 17, 2025 by tclin914 Loading…
[X86] Remove LowerFCanonicalize and use generic expansion backend:AMDGPU backend:SystemZ backend:X86 llvm:SelectionDAG SelectionDAGISel as well
#147877 opened Jul 10, 2025 by woruyu Loading…
Added partial support for compiling C++20 modules and header-units without scanning. backend:SystemZ clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:modules C++20 modules and Clang Header Modules clang Clang issues not falling into any other category llvm:support
#147682 opened Jul 9, 2025 by HassanSajjad-302 Loading…
[CGP] Eliminate noop bitcasts backend:AArch64 backend:AMDGPU backend:SystemZ backend:X86 debuginfo llvm:codegen llvm:globalisel llvm:transforms
#146961 opened Jul 3, 2025 by preames Loading…
[RISCV] Add optimization for memset inline backend:AArch64 backend:AMDGPU backend:ARM backend:Hexagon backend:MIPS backend:PowerPC backend:RISC-V backend:SystemZ backend:X86 llvm:SelectionDAG SelectionDAGISel as well
#146673 opened Jul 2, 2025 by BoyaoWang430 Loading…
[SimplifyIndVar] ICMP predicate conversion to EQ/NE backend:SystemZ llvm:transforms PGO Profile Guided Optimizations
#144945 opened Jun 19, 2025 by SergeyShch01 Loading…
[GOFF] Emit symbols for functions. backend:SystemZ llvm:codegen llvm:mc Machine (object) code
#144437 opened Jun 16, 2025 by redstar Loading…
[MachineSink] Consider multiple instructions when sinking into cycle backend:AMDGPU backend:SystemZ llvm:codegen
#142641 opened Jun 3, 2025 by joe-rivos Loading…
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