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[Clang][test] Replace legacy -target with --target=. backend:RISC-V clang Clang issues not falling into any other category
#66572 by yetingk was merged Sep 18, 2023 Loading…
Enable v for RISCV64 Android backend:RISC-V clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' clang Clang issues not falling into any other category
#69261 by hiraditya was merged Oct 17, 2023 Loading…
[RISCV] Match gather(splat(ptr)) as zero strided load backend:RISC-V
#65769 by preames was merged Sep 8, 2023 Loading…
[RISCV][GISel] Add a post legalizer combiner and enable a couple comb… backend:RISC-V llvm:globalisel
#67053 by topperc was merged Sep 22, 2023 Loading…
[RISCV] Remove duplicate pattern in RISCVInstrInfoVPseudos.td backend:RISC-V
#67436 by 4vtomat was merged Sep 27, 2023 Loading…
[RISCV][AArch64] Don't allow -mvscale-min/max options to be passed to the clang driver. backend:AArch64 backend:RISC-V clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' clang Clang issues not falling into any other category
#68065 by topperc was merged Oct 3, 2023 Loading…
[DAG][X86] Fold mgather/mscatter/etc with splat index backend:RISC-V backend:X86 llvm:SelectionDAG SelectionDAGISel as well
#65980 by preames was merged Sep 13, 2023 Loading…
[RISCV] Split VFWREDUSUM and VFWREDOSUM SchedWrite backend:RISC-V
#65386 by michaelmaitland was merged Sep 5, 2023 Loading…
[RISCV] Use add.uw for (or (and X, 0xFFFFFFFF), Y) if Y has zeroes in the lower 32 bits. backend:RISC-V
#65402 by topperc was merged Sep 6, 2023 Loading…
[TableGen][RISCV][GlobalISel] Select G_ICMP, G_LOAD, G_ZEXTLOAD and G_STORE backend:RISC-V llvm:globalisel
#67581 by nitinjohnraj was closed Sep 27, 2023 Loading…
[RISCV] Use range-based for loops in RISCVOptWInstrs. NFC backend:RISC-V
#69647 by topperc was merged Oct 20, 2023 Loading…
[GISel] Pass MPO and VA to assignValueToAddress by const reference. NFC backend:AArch64 backend:AMDGPU backend:ARM backend:m68k backend:RISC-V backend:X86 llvm:globalisel
#69810 by topperc was merged Oct 24, 2023 Loading…
[Driver][NFC] Make some derived classes of Tool final backend:AMDGPU backend:RISC-V backend:SPIR-V clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' clang Clang issues not falling into any other category
#70416 by brad0 was merged Oct 27, 2023 Loading…
[RISCV] Remove Name and OverloadedName from RVVIntrinsicDef. NFC backend:RISC-V clang:frontend Language frontend issues, e.g. anything involving "Sema" clang Clang issues not falling into any other category
#74907 by topperc was merged Dec 9, 2023 Loading…
[Test] Pre-submit tests for #68972 backend:RISC-V
#69040 by LiqinWeng was merged Oct 14, 2023 Loading…
Revert "[RISCV][CostModel] Add getRISCVInstructionCost() to TTI for Cost… (#73651)" backend:RISC-V llvm:analysis Includes value tracking, cost tables and constant folding
#76536 by vitalybuka was merged Dec 28, 2023 Loading…
[RISCV] Rename X10_PD register to X10_X11. backend:RISC-V
#77383 by topperc was closed Jan 8, 2024 Loading…
Revert "[RISCV] Refine cost on Min/Max reduction" backend:RISC-V llvm:analysis Includes value tracking, cost tables and constant folding
#80340 by preames was merged Feb 1, 2024 Loading…
revert type profiling change as it breaks compiler-rt test on non-Linux platforms backend:RISC-V
#82581 by mingmingl-llvm was closed Feb 22, 2024 Loading…
[RISCV] Simplify how we find combinable cm.pop+ret. backend:RISC-V
#130204 by topperc was merged Mar 7, 2025 Loading…
[RISCV] Construct constants via instructions if materialization is costly backend:RISC-V
#87036 by wangpc-pp was closed Mar 29, 2024 Loading…
[RISCV] Merge RegStart with RegEnd in parseRegListCommon. NFC backend:RISC-V
#133867 by topperc was merged Apr 1, 2025 Loading…
[RISCV] Validate the end of register ranges in Zcmp register lists. backend:RISC-V llvm:mc Machine (object) code
#133866 by topperc was merged Apr 1, 2025 Loading…
Revert "[RISCV] RISCV vector calling convention (2/2) (#79096)" backend:RISC-V
#88511 by 4vtomat was merged Apr 12, 2024 Loading…
[RISCV] Make fixed-point instructions commutable backend:RISC-V
#90372 by wangpc-pp was closed Apr 28, 2024 Loading…
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