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Pull requests: llvm/llvm-project
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[LTO] A static relocation model can override the PIC level wrt treating external address as directly accessible backend:ARM backend:X86 clang:codegen IR generation bugs: mangling, exceptions, etc. clang Clang issues not falling into any other category llvm:ir LTO Link time optimization (regular/full LTO or ThinLTO)
#65512 by wolfy1961 was closed Oct 31, 2023 Loading…
[ARM] Change CRC predicated to just HasCRC backend:ARM llvm:mc Machine (object) code
#65591 by davemgreen was closed Sep 11, 2023 Loading…
[ModuloSchedule] Implement modulo variable expansion for pipelining backend:AArch64 backend:ARM backend:PowerPC llvm:codegen llvm:optimizations
#65609 by ytmukai was merged Jun 12, 2024 Loading…
[InlineAsm] refactor InlineAsm class NFC backend:ARM backend:Sparc backend:X86 llvm:globalisel llvm:SelectionDAG SelectionDAGISel as well
#65649 by nickdesaulniers was merged Sep 11, 2023 Loading…
[clang] Better bitfield access units backend:AArch64 backend:ARM backend:loongarch backend:PowerPC backend:SystemZ backend:WebAssembly clang:codegen IR generation bugs: mangling, exceptions, etc. clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:openmp OpenMP related changes to Clang clang Clang issues not falling into any other category
#65742 by urnathan was closed Mar 29, 2024 Loading…
[ARM][ISel] Fix crash of ISD::FMINNUM/FMAXNUM backend:ARM
#65849 by vfdff was merged Sep 14, 2023 Loading…
[AMDGPU] [SIFrameLowering] Use LiveRegUnits instead of LivePhysRegs backend:AArch64 backend:AMDGPU backend:ARM backend:RISC-V llvm:regalloc
#65962 by prtaneja was merged Sep 21, 2023 Loading…
[InlineAsm] wrap ConstraintCode in enum class NFC backend:AArch64 backend:ARM backend:m68k backend:RISC-V backend:X86 llvm:globalisel llvm:ir llvm:SelectionDAG SelectionDAGISel as well
#66003 by nickdesaulniers was merged Sep 13, 2023 Loading…
[LiveRegUnits] Enhanced the register liveness check backend:AArch64 backend:ARM backend:RISC-V llvm:regalloc
#66061 by prtaneja was closed Mar 1, 2025 Loading…
[MachineBasicBlock] Fix use after free in SplitCriticalEdge backend:AArch64 backend:AMDGPU backend:ARM backend:loongarch backend:m68k backend:MSP430 backend:PowerPC backend:RISC-V backend:Sparc backend:WebAssembly backend:X86
#66188 by perlfu was closed Oct 11, 2023 Loading…
reland [InlineAsm] wrap ConstraintCode in enum class NFC backend:AArch64 backend:ARM backend:loongarch backend:m68k backend:MSP430 backend:RISC-V backend:Sparc backend:WebAssembly backend:X86 llvm:globalisel llvm:ir llvm:SelectionDAG SelectionDAGISel as well
#66264 by nickdesaulniers was merged Sep 13, 2023 Loading…
Bfi precision backend:AArch64 backend:AMDGPU backend:ARM backend:X86 compiler-rt llvm:analysis Includes value tracking, cost tables and constant folding llvm:support llvm:transforms LTO Link time optimization (regular/full LTO or ThinLTO) PGO Profile Guided Optimizations
#66285 by MatzeB was merged Oct 25, 2023 Loading…
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes backend:AArch64 backend:AMDGPU backend:ARM backend:DirectX backend:loongarch backend:m68k backend:MSP430 backend:RISC-V backend:Sparc backend:WebAssembly backend:X86 clang:codegen IR generation bugs: mangling, exceptions, etc. clang:frontend Language frontend issues, e.g. anything involving "Sema" clang Clang issues not falling into any other category debuginfo flang:driver flang:openmp flang Flang issues not falling into any other category libc++abi libc++abi C++ Runtime Library. Not libc++. lld:COFF lld:ELF lld:MachO lld:wasm lld lldb llvm:globalisel llvm:SelectionDAG SelectionDAGISel as well LTO Link time optimization (regular/full LTO or ThinLTO) mlir:core MLIR Core Infrastructure mlir:execution-engine mlir:gpu mlir:llvm mlir platform:windows tools:llvm-exegesis
#66295 by aeubanks was merged Sep 14, 2023 Loading…
[ARM] Always lower direct calls as direct when the outliner is enabled backend:ARM
#66434 by jroelofs was merged Sep 15, 2023 Loading…
[CodeGen] Really renumber slot indexes before register allocation backend:AArch64 backend:AMDGPU backend:ARM backend:AVR backend:CSKY backend:Hexagon backend:MIPS backend:MSP430 backend:PowerPC backend:RISC-V backend:Sparc backend:SystemZ backend:VE backend:X86 llvm:globalisel llvm:transforms
#67038 by jayfoad was merged Oct 9, 2023 Loading…
Add command line option --no-trap-after-noreturn backend:ARM
#67051 by majaha was merged Sep 22, 2023 Loading…
[TargetLowering] Deduplicate choosing InlineAsm constraint between ISels backend:AArch64 backend:AMDGPU backend:ARM backend:loongarch backend:m68k backend:RISC-V backend:Sparc backend:X86 llvm:globalisel llvm:SelectionDAG SelectionDAGISel as well
#67057 by nickdesaulniers was merged Sep 25, 2023 Loading…
[ARM] Add writeback information to STC and LDC instructions. backend:ARM
#67180 by Rot127 was closed Apr 25, 2025 Loading…
MachineBlockPlacement: Add tolerance to comparisons backend:AArch64 backend:AMDGPU backend:ARM backend:X86 llvm:support
#67197 by MatzeB was closed Oct 23, 2023 Loading…
[Driver] Hook up Haiku ARM support backend:ARM clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' clang:frontend Language frontend issues, e.g. anything involving "Sema" clang Clang issues not falling into any other category
#67222 by brad0 was merged Oct 9, 2023 Loading…
[Legalizer] Expand fmaximum and fminimum backend:ARM backend:PowerPC backend:RISC-V llvm:SelectionDAG SelectionDAGISel as well
#67301 by ecnelises was merged Apr 29, 2024 Loading…
[RA] Don't split a register generated from another split backend:ARM
#67351 by weiguozhi was merged Sep 26, 2023 Loading…
[ARM] fix "+fp.dp" in multilib selection backend:ARM clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' clang Clang issues not falling into any other category
#67412 by domin144 was merged Oct 19, 2023 Loading…
[Target] Change SelectionDAGISel as well
no-trap-after-noreturn to trap-after-noreturn backend:AArch64 backend:ARM backend:NVPTX backend:X86 llvm:globalisel llvm:SelectionDAG #67925 by chsigg was closed Oct 3, 2023 Loading…
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