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[ARM] Introduce intrinsics for MVE fma under strict-fp. backend:ARM clang:frontend Language frontend issues, e.g. anything involving "Sema" llvm:ir
#169771 by davemgreen was merged Nov 30, 2025 Loading… updated Nov 30, 2025
[clang] Refactor to remove clangDriver dependency from clangFrontend and flangFrontend backend:AArch64 backend:AMDGPU backend:ARM backend:CSKY backend:Hexagon backend:loongarch backend:MIPS backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:X86 bazel "Peripheral" support tier build system: utils/bazel clang:as-a-library libclang and C++ API clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:modules C++20 modules and Clang Header Modules clang:openmp OpenMP related changes to Clang clang Clang issues not falling into any other category clang-tools-extra clangd flang:driver flang Flang issues not falling into any other category lldb llvm:mc Machine (object) code
#165277 by naveen-seth was merged Nov 23, 2025 Loading… updated Nov 29, 2025
[ARM] Auto-decode pred operands of Thumb instructions backend:ARM bazel "Peripheral" support tier build system: utils/bazel
#156540 by s-barannikov was merged Nov 28, 2025 Loading… updated Nov 28, 2025
[RegAlloc] Remove default restriction on non-trivial rematerialization backend:AArch64 backend:ARM backend:RISC-V backend:SystemZ backend:X86 llvm:codegen llvm:globalisel
#159211 by lukel97 was merged Oct 4, 2025 Loading… updated Nov 28, 2025
[ARM] Remove Subtarget from ARMAsmPrinter backend:ARM
#168264 by davemgreen was merged Nov 27, 2025 Loading… updated Nov 27, 2025
CodeGen: Make all targets override pseudos with pointers backend:AArch64 backend:AMDGPU backend:ARM backend:CSKY backend:DirectX backend:Hexagon backend:Lanai backend:loongarch backend:m68k backend:MIPS backend:MSP430 backend:NVPTX backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 backend:Xtensa llvm:codegen llvm:globalisel llvm:mc Machine (object) code llvm:SelectionDAG SelectionDAGISel as well tablegen
#159881 by arsenm was merged Nov 26, 2025 Loading… updated Nov 26, 2025
[NVPTX] Lower LLVM masked vector loads and stores to PTX backend:AArch64 backend:ARM backend:Hexagon backend:NVPTX backend:RISC-V backend:X86 llvm:analysis Includes value tracking, cost tables and constant folding llvm:SelectionDAG SelectionDAGISel as well llvm:transforms
#159387 by dakersnar was merged Nov 25, 2025 Loading… updated Nov 25, 2025
CodeGen: Move libcall lowering configuration to subtarget backend:AArch64 backend:AMDGPU backend:ARM backend:DirectX backend:Hexagon backend:Lanai backend:loongarch backend:MIPS backend:MSP430 backend:NVPTX backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 backend:Xtensa llvm:codegen llvm:SelectionDAG SelectionDAGISel as well
#168621 by arsenm was merged Nov 25, 2025 Loading… updated Nov 25, 2025
[Clang][Sema] Emit diagnostic for __builtin_vectorelements(<SVEType>) when SVE is not available. backend:AArch64 backend:ARM clang:frontend Language frontend issues, e.g. anything involving "Sema" clang Clang issues not falling into any other category
#168097 by paulwalker-arm was merged Nov 25, 2025 Loading… updated Nov 25, 2025
[ARM] Introduce intrinsics for MVE add/sub/mul under strict-fp. backend:ARM clang:frontend Language frontend issues, e.g. anything involving "Sema" llvm:ir
#169156 by davemgreen was merged Nov 25, 2025 Loading… updated Nov 25, 2025
[ARM][KFCI] Fix unused variable for #163698 backend:ARM
#164857 by googlewalt was merged Oct 23, 2025 Loading… updated Nov 24, 2025
[ARM] Restore hasSideEffects flag on t2WhileLoopSetup backend:ARM
#168948 by s-barannikov was merged Nov 21, 2025 Loading… updated Nov 21, 2025
CodeGen: Remove target hook for terminal rule backend:AArch64 backend:AMDGPU backend:ARM backend:Hexagon backend:NVPTX backend:PowerPC backend:RISC-V backend:SystemZ backend:WebAssembly backend:X86 llvm:codegen llvm:regalloc
#165962 by arsenm was merged Nov 12, 2025 Loading… updated Nov 21, 2025
[ARM] Pattern match Low Overhead Loops pseudos (NFC) backend:ARM
#168209 by s-barannikov was merged Nov 18, 2025 Loading… updated Nov 20, 2025
[ARM] TableGen-erate node descriptions backend:ARM
#168212 by s-barannikov was merged Nov 18, 2025 Loading… updated Nov 20, 2025
[GlobalMerge] add a command to force global merge backend:ARM llvm:codegen
#168231 by Zhenhang1213 was closed Nov 20, 2025 Loading… updated Nov 20, 2025
CodeGen: Add subtarget to TargetLoweringBase constructor backend:AArch64 backend:AMDGPU backend:ARM backend:DirectX backend:Hexagon backend:Lanai backend:loongarch backend:MIPS backend:MSP430 backend:NVPTX backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 backend:Xtensa llvm:codegen llvm:SelectionDAG SelectionDAGISel as well
#168620 by arsenm was merged Nov 19, 2025 Loading… updated Nov 19, 2025
[llvm][ARM] Allow MOVT and MOVW on the offset between two labels backend:ARM
#168072 by hwti was merged Nov 18, 2025 Loading… updated Nov 19, 2025
[TTI] Use MemIntrinsicCostAttributes for getMaskedMemoryOpCost backend:AArch64 backend:ARM backend:Hexagon backend:RISC-V backend:X86 llvm:analysis Includes value tracking, cost tables and constant folding llvm:transforms vectorizers
#168029 by arcbbb was merged Nov 19, 2025 Loading… updated Nov 19, 2025
ExpandFp: Require RuntimeLibcallsInfo analysis backend:AArch64 backend:AMDGPU backend:ARM backend:WebAssembly backend:X86 llvm:analysis Includes value tracking, cost tables and constant folding llvm:codegen llvm:ir llvm:SelectionDAG SelectionDAGISel as well llvm:transforms LTO Link time optimization (regular/full LTO or ThinLTO) tablegen
#165197 by arsenm was closed Nov 18, 2025 Loading… updated Nov 18, 2025
[CGP]: Optimize mul.overflow. backend:AArch64 backend:ARM backend:loongarch backend:PowerPC backend:RISC-V backend:X86 llvm:codegen
#148343 by hassnaaHamdi was merged Nov 18, 2025 Loading… updated Nov 18, 2025
[ARM] Use TargetMachine over Subtarget in ARMAsmPrinter backend:ARM
#166329 by davemgreen was merged Nov 12, 2025 Loading… updated Nov 17, 2025
[DAG] Add strictfp implicit def reg after metadata. backend:AArch64 backend:AMDGPU backend:ARM backend:X86 llvm:globalisel llvm:SelectionDAG SelectionDAGISel as well
#168282 by davemgreen was merged Nov 17, 2025 Loading… updated Nov 17, 2025
[MachineScheduler][AMDGPU] Allow scheduling of single-MI regions backend:AMDGPU backend:ARM backend:PowerPC backend:X86 mi-sched machine instruction scheduler
#128739 by lucas-rami was merged Feb 27, 2025 Loading… updated Nov 17, 2025
[GlobalMerge]Prefer use global-merge-max-offset instead of the target-specific constant offset. backend:AArch64 backend:ARM llvm:codegen
#165591 by hstk30-hw was merged Nov 17, 2025 Loading… updated Nov 17, 2025
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