- Notifications
You must be signed in to change notification settings - Fork 15.3k
Pull requests: llvm/llvm-project
Author
Label
Projects
Milestones
Reviews
Assignee
Sort
Pull requests list
Try To Guess SGMasks for Inline Asm Instructions backend:AMDGPU
#155491 opened Aug 26, 2025 by linuxrocks123 Loading… updated Dec 1, 2025
[mlir][AMDGPU] Add scaled wmma ops for gfx1250 backend:AMDGPU mlir:amdgpu mlir:gpu mlir
#169854 opened Nov 27, 2025 by justinrosner Loading… updated Dec 1, 2025
[AMDGPU] Apply alignment attr for make.buffer.rsrc backend:AMDGPU clang Clang issues not falling into any other category llvm:transforms
#166914 opened Nov 7, 2025 by Shoreshen Loading… updated Dec 1, 2025
[AMDGPU][InsertWaitCnts] Optimize loadcnt insertion at function boundaries backend:AMDGPU llvm:globalisel
#169647 opened Nov 26, 2025 by PankajDwivedi-25 Loading… updated Nov 27, 2025
[AMDGPU]: Rewrite mbcnt_lo/mbcnt_hi to work item ID where applicable backend:AMDGPU llvm:instcombine Covers the InstCombine, InstSimplify and AggressiveInstCombine passes llvm:transforms
#160496 opened Sep 24, 2025 by TejaX-Alaghari Loading… updated Nov 27, 2025
[AMDGPU] Propagate alias information in AMDGPULowerKernelArguments. backend:AMDGPU
#161375 opened Sep 30, 2025 by PeddleSpam Loading… updated Nov 27, 2025
[AMDGPU] Enable sinking of free vector ops that will be folded into their uses backend:AMDGPU llvm:globalisel
#162580 opened Oct 9, 2025 by doru1004 Loading… updated Nov 26, 2025
[RegisterCoalescer] Improve register allocation for return values by limiting rematerialization backend:AArch64 backend:AMDGPU backend:ARM backend:loongarch backend:MIPS backend:PowerPC backend:RISC-V backend:X86 clang Clang issues not falling into any other category debuginfo llvm:codegen llvm:regalloc
#163047 opened Oct 12, 2025 by rez5427 Loading… updated Nov 25, 2025
[AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction backend:AMDGPU llvm:globalisel
#137137 opened Apr 24, 2025 by vg0204 Loading… updated Nov 25, 2025
[AMDGPU] Emit b32 movs if (a)v_mov_b64_pseudo dest vgprs are misaligned backend:AMDGPU
#160547 opened Sep 24, 2025 by JanekvO Loading… updated Nov 20, 2025
[TTI] Introduce getInstructionUniformity API for flexible uniformity analysis backend:AMDGPU backend:NVPTX llvm:adt llvm:analysis Includes value tracking, cost tables and constant folding llvm:codegen
#137639 opened Apr 28, 2025 by PankajDwivedi-25 Loading… updated Nov 20, 2025
PHIElimination: add target hook to control reuse. backend:AMDGPU llvm:codegen llvm:regalloc
#163604 opened Oct 15, 2025 by jgu222 Loading… updated Nov 20, 2025
[AMDGPU] Fix Inefficient S_CSELECT_B64 Sequence backend:AMDGPU
#167780 opened Nov 12, 2025 by linuxrocks123 Loading… updated Nov 15, 2025
[AMDGPU] Enable overwrite ALU bit in sched.barrier mask backend:AMDGPU
#160782 opened Sep 25, 2025 by jplehr Loading… updated Nov 13, 2025
[AMDGPU][InstCombine] Fold ballot intrinsic based on llvm.assume hints backend:AMDGPU llvm:instcombine Covers the InstCombine, InstSimplify and AggressiveInstCombine passes llvm:transforms
#160670 opened Sep 25, 2025 by TejaX-Alaghari Loading… updated Nov 13, 2025
[AMDGPU] Match bitsin(typeof(x)) - popcnt(x) to s_bcnt0_i32 backend:AMDGPU clang:frontend Language frontend issues, e.g. anything involving "Sema" clang Clang issues not falling into any other category llvm:ir
#164847 opened Oct 23, 2025 by linuxrocks123 Loading… updated Nov 5, 2025
AMDGPU: share LDS budget logic and add experimental LDS buffering pass backend:AMDGPU llvm:transforms
#166388 opened Nov 4, 2025 by yxsamliu Loading… updated Nov 5, 2025
[AMDGPU] Add module flag to control TBUFFER combining backend:AMDGPU
#156454 opened Sep 2, 2025 by harrisonGPU Loading… updated Nov 3, 2025
[mlir] Add description to amdgpu.dpp and rocdl.update.dpp backend:AMDGPU mlir:amdgpu mlir:gpu mlir:llvm mlir
#116598 opened Nov 18, 2024 by knwng Loading… updated Oct 30, 2025
[AMDGPU] Add sema check for global_atomic_fadd_v2f16 builtin backend:AMDGPU clang:frontend Language frontend issues, e.g. anything involving "Sema" clang Clang issues not falling into any other category
#158145 opened Sep 11, 2025 by tcgu-amd Loading… updated Oct 14, 2025
[DAGCombiner] Set shift flags during visit. backend:AArch64 backend:AMDGPU backend:ARM backend:loongarch backend:PowerPC backend:RISC-V backend:SystemZ backend:WebAssembly backend:X86 llvm:SelectionDAG SelectionDAGISel as well
#91239 opened May 6, 2024 by goldsteinn • Draft updated Oct 2, 2025
[AMDGPU] Add intrinsic-based optimization for rotate and funnel shift patterns backend:AMDGPU llvm:globalisel llvm:ir llvm:transforms
#153406 opened Aug 13, 2025 by aleksandar-amd Loading… updated Oct 1, 2025
[Verifier][AMDGPU] Restrict targets for chain calling convention. backend:AMDGPU llvm:ir
#157469 opened Sep 8, 2025 by jofrn Loading… updated Sep 11, 2025
Limit Alloca->LDS promotion based on speculations as to eventual register pressure backend:AMDGPU
#152814 opened Aug 8, 2025 by linuxrocks123 Loading… updated Aug 20, 2025
[AMDGPU] Post-RA AGPR copy elimination pass backend:AMDGPU
#153901 opened Aug 15, 2025 by lucas-rami • Draft updated Aug 16, 2025
Previous Next
ProTip! Type g i on any issue or pull request to go back to the issue listing page.