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Pull requests list

[TTI] Use MemIntrinsicCostAttributes for getGatherScatterOpCost backend:AArch64 backend:ARM backend:Hexagon backend:RISC-V backend:X86 llvm:analysis Includes value tracking, cost tables and constant folding llvm:transforms vectorizers
#168650 opened Nov 19, 2025 by arcbbb Loading… updated Nov 28, 2025
12
[RegisterCoalescer] Improve register allocation for return values by limiting rematerialization backend:AArch64 backend:AMDGPU backend:ARM backend:loongarch backend:MIPS backend:PowerPC backend:RISC-V backend:X86 clang Clang issues not falling into any other category debuginfo llvm:codegen llvm:regalloc
#163047 opened Oct 12, 2025 by rez5427 Loading… updated Nov 25, 2025
32
[Android] Drop workarounds for older Android API levels pre 23 backend:ARM backend:X86 clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' clang Clang issues not falling into any other category compiler-rt:sanitizer llvm:ir llvm:transforms
#161893 opened Oct 3, 2025 by brad0 Loading… updated Oct 10, 2025
11
[DAGCombiner] Set shift flags during visit. backend:AArch64 backend:AMDGPU backend:ARM backend:loongarch backend:PowerPC backend:RISC-V backend:SystemZ backend:WebAssembly backend:X86 llvm:SelectionDAG SelectionDAGISel as well
#91239 opened May 6, 2024 by goldsteinn • Draft updated Oct 2, 2025
17
[WIP][CodeGen] Modifying MBB's liveins representation as into regUnits backend:AArch64 backend:AMDGPU backend:ARM backend:Hexagon backend:m68k backend:X86 llvm:codegen llvm:globalisel llvm:regalloc tools:llvm-exegesis
#129847 opened Mar 5, 2025 by vg0204 Loading… updated May 26, 2025
@vg0204
79
[llvm] Prefer StringRef::substr(0, N) to slice(0, N) (NFC) backend:ARM backend:PowerPC backend:RISC-V backend:X86 llvm:adt llvm:binary-utilities llvm:mc Machine (object) code llvm:support tablegen
#113793 opened Oct 27, 2024 by kazutakahirata Loading… updated Oct 31, 2024
5
[SimplifyCFG] Use hash map to continue hoisting the common instructions backend:ARM llvm:transforms
#78615 opened Jan 18, 2024 by RouzbehPaktinat Loading… updated Mar 26, 2024
108
[RISCV] Add macro fusions for Xiangshan backend:AArch64 backend:AMDGPU backend:ARM backend:RISC-V backend:X86 llvm:mc Machine (object) code
#72362 opened Nov 15, 2023 by wangpc-pp Loading… updated Mar 19, 2024
18
ProTip! Updated in the last three days: updated:>2025-11-28.