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Pull requests: llvm/llvm-project
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[AMDGPU] Optionally use the downcasted version for SchedGroups backend:AMDGPU
#164024 opened Oct 17, 2025 by jrbyrnes Loading…
[AMDGPU] Relax restrictions on amdgcn.cs.chain intrinsic backend:AMDGPU llvm:ir
#169785 opened Nov 27, 2025 by rovka Loading…
[GIselValueTracking] Correctly truncate/zext G_PTRTOADDR backend:AMDGPU llvm:globalisel
#143816 opened Jun 11, 2025 by arichardson Loading…
[GISelValueTracking] Baseline test for G_PTRTOADDR backend:AMDGPU llvm:globalisel
#143815 opened Jun 11, 2025 by arichardson Loading…
[AMDGPU] Do not add cost for register aligned shufflevectors backend:AMDGPU llvm:analysis Includes value tracking, cost tables and constant folding llvm:transforms
#137052 opened Apr 23, 2025 by jrbyrnes Loading…
[NFC][LiveStacks] Use vectors instead of map and unordred_map backend:AMDGPU llvm:codegen
#165477 opened Oct 28, 2025 by Ralender Loading…
WIP. [AMDGPU] Convert s_cselect to v_cndmask if its single user isVALU backend:AMDGPU
#113705 opened Oct 25, 2024 by alex-t Loading…
[AMDGPU] Support llvm.amdgcn.wave.id on gfx942/gfx950 backend:AMDGPU
#164063 opened Oct 18, 2025 by XChy Loading…
[AMDGPU] Allow amdgpu-waves-per-eu to lower target occupancy range backend:AMDGPU
#168358 opened Nov 17, 2025 by lucas-rami Loading…
Reland "[LICM] Sink unused l-invariant loads in preheader #157559" backend:AMDGPU backend:PowerPC llvm:transforms
#170204 opened Dec 1, 2025 by VigneshwarJ Loading…
[AMDGPU] Allow any SGPRs for chain callees backend:AMDGPU llvm:globalisel
#168345 opened Nov 17, 2025 by rovka Loading…
[Codegen][NewPM] Explicitly Nest Passes in CodegenPassBuilder backend:AMDGPU backend:X86
#169867 opened Nov 28, 2025 by boomanaiden154 Loading…
[MachineSink] Consider multiple instructions when sinking into cycle backend:AMDGPU backend:SystemZ llvm:codegen
#142641 opened Jun 3, 2025 by joe-rivos Loading…
[llvm][InstSimplify]: Increase the MaxRecurse limit to support deeper fold (icmp eq a, c1) | (icmp ult f(a), c2) to icmp ult f(a), c2. backend:AMDGPU llvm:analysis Includes value tracking, cost tables and constant folding llvm:instcombine Covers the InstCombine, InstSimplify and AggressiveInstCombine passes llvm:transforms
#155650 opened Aug 27, 2025 by YLChenZ Loading…
[AMDGPU] Add KnownBits simplification combines to RegBankCombiner backend:AMDGPU llvm:globalisel
#141591 opened May 27, 2025 by Pierre-vh Loading…
[AMDGPU] Enable IAS in the AMDGPU backend backend:AMDGPU
#85518 opened Mar 16, 2024 by brad0 Loading…
[AMDGPU] Add liverange split instructions into BB Prolog backend:AMDGPU
#117544 opened Nov 25, 2024 by cdevadas Loading…
WIP: AMDGPU: Implement getRegSequenceLikeInputs for v_pk_mov_b32 backend:AMDGPU
#125657 opened Feb 4, 2025 by arsenm Loading…
[AMDGPU][NFC] Split smrd prefetch isel backend:AMDGPU
#83627 opened Mar 1, 2024 by vangthao95 Loading…
[AMDGPU][MISCHED] GCNBalancedSchedStrategy. backend:AMDGPU llvm:globalisel
#68229 opened Oct 4, 2023 by alex-t Loading…
[LoopPeel][TTI][AMDGPU] Flag to control aggressiveness of compare elimination peeling backend:AMDGPU llvm:analysis Includes value tracking, cost tables and constant folding llvm:transforms
#122780 opened Jan 13, 2025 by lucas-rami Loading…
[AMDGPU] Swap select operands to allow later v_cndmask shrinking into vop2 backend:AMDGPU llvm:globalisel
#142140 opened May 30, 2025 by mihajlovicana Loading…
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