- Notifications
You must be signed in to change notification settings - Fork 15.3k
Pull requests: llvm/llvm-project
Author
Label
Projects
Milestones
Reviews
Assignee
Sort
Pull requests list
AMDGPU: Fix treating unknown mem operands as uniform backend:AMDGPU llvm:globalisel
#168980 by arsenm was merged Dec 2, 2025 Loading… updated Dec 2, 2025
AMDGPU: Add baseline test for split/widen invariant loads backend:AMDGPU
#168913 by arsenm was merged Nov 21, 2025 Loading… updated Dec 2, 2025
AMDGPU: Handle invariant when lowering global loads backend:AMDGPU
#168914 by arsenm was merged Nov 21, 2025 Loading… updated Dec 2, 2025
AMDGPU: Handle invariant loads when considering if a load can be scalar backend:AMDGPU
#168787 by arsenm was merged Nov 20, 2025 Loading… updated Dec 2, 2025
Reapply "DAG: Allow select ptr combine for non-0 address spaces" (#168292) backend:AMDGPU backend:NVPTX llvm:SelectionDAG SelectionDAGISel as well
#168786 by arsenm was merged Nov 20, 2025 Loading… updated Dec 2, 2025
AMDGPU: Fix treating divergent loads as uniform backend:AMDGPU
#168785 by arsenm was merged Nov 20, 2025 Loading… updated Dec 2, 2025
[AMDGPU][GISel] Add RegBankLegalize support for G_STRICT_{FADD|FMUL} backend:AMDGPU llvm:globalisel
#169406 by chinmaydd was merged Dec 2, 2025 Loading… updated Dec 2, 2025
Avoid maxnum(sNaN, x) optimizations / folds backend:AMDGPU backend:ARM backend:X86 llvm:analysis Includes value tracking, cost tables and constant folding llvm:globalisel llvm:instcombine Covers the InstCombine, InstSimplify and AggressiveInstCombine passes llvm:SelectionDAG SelectionDAGISel as well llvm:transforms
#170181 by LewisCrawford was merged Dec 2, 2025 Loading… updated Dec 2, 2025
[AMDGPU] Allow any SGPRs for chain callees backend:AMDGPU llvm:globalisel
#168345 by rovka was merged Dec 2, 2025 Loading… updated Dec 2, 2025
simplifyBinaryIntrinsic: Return nan if snan is passed maxnum/minnum backend:AMDGPU floating-point Floating-point math llvm:analysis Includes value tracking, cost tables and constant folding llvm:instcombine Covers the InstCombine, InstSimplify and AggressiveInstCombine passes llvm:ir llvm:transforms
#158470 by wzssyqa was closed Dec 2, 2025 Loading… updated Dec 2, 2025
[SelectionDAG] Remove Floating-point math llvm:SelectionDAG SelectionDAGISel as well
NoNaNsFPMath in visitFCmp backend:AArch64 backend:AMDGPU backend:MIPS backend:PowerPC backend:RISC-V backend:X86 floating-point #163519 by paperchalice was closed Nov 28, 2025 Loading… updated Dec 2, 2025
AMDGPU: Try to use zext to implement constant-32-bit addrspacecast backend:AMDGPU llvm:globalisel
#168977 by arsenm was merged Dec 1, 2025 Loading… updated Dec 1, 2025
[DA] Update a test for #164704: Check for overflow in strong SIV test backend:AMDGPU bazel "Peripheral" support tier build system: utils/bazel clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' lldb llvm:analysis Includes value tracking, cost tables and constant folding mlir:gpu mlir
#165904 by google-yfyang was closed Dec 1, 2025 Loading… updated Dec 1, 2025
[AMDGPU] Allow hazard checks for WMMA co-exec backend:AMDGPU
#168805 by rampitec was merged Dec 1, 2025 Loading… updated Dec 1, 2025
[AMDGPU] Refactor hazard recognizer for VALU-pipeline hazards. NFCI. backend:AMDGPU
#168801 by rampitec was merged Dec 1, 2025 Loading… updated Dec 1, 2025
[AMDGPU][NPM] Preserve analyses in AMDGPURewriteAGPRCopyMFMA for NPM backend:AMDGPU
#170130 by PrasoonMishra was merged Dec 1, 2025 Loading… updated Dec 1, 2025
AMDGPU: Autogenerate checks in a test backend:AMDGPU llvm:transforms
#168815 by nhaehnle was merged Nov 20, 2025 Loading… updated Dec 1, 2025
[LoopUnroll] Skip remainder loop guard if skip unrolled loop backend:AMDGPU backend:PowerPC backend:RISC-V debuginfo llvm:transforms
#156549 by jdenny-ornl was merged Oct 7, 2025 Loading… updated Nov 30, 2025
[clang] Refactor to remove clangDriver dependency from clangFrontend and flangFrontend backend:AArch64 backend:AMDGPU backend:ARM backend:CSKY backend:Hexagon backend:loongarch backend:MIPS backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:X86 bazel "Peripheral" support tier build system: utils/bazel clang:as-a-library libclang and C++ API clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:modules C++20 modules and Clang Header Modules clang:openmp OpenMP related changes to Clang clang Clang issues not falling into any other category clang-tools-extra clangd flang:driver flang Flang issues not falling into any other category lldb llvm:mc Machine (object) code
#165277 by naveen-seth was merged Nov 23, 2025 Loading… updated Nov 29, 2025
Revert "[RegAlloc] Relax the split constrain on MBB prolog" backend:AMDGPU backend:X86 llvm:codegen llvm:regalloc
#169990 by ronlieb was merged Nov 29, 2025 Loading… updated Nov 29, 2025
[RegAlloc] Relax the split constrain on MBB prolog backend:AMDGPU backend:X86 llvm:codegen llvm:regalloc
#168259 by LuoYuanke was merged Nov 28, 2025 Loading… updated Nov 29, 2025
[AMDGPU] Add support for HW_REG_WAVE_SCHED_MODE backend:AMDGPU
#169840 by lancesix was merged Nov 28, 2025 Loading… updated Nov 28, 2025
[LICM] Sink unused l-invariant loads in preheader. backend:AMDGPU backend:PowerPC clang:openmp OpenMP related changes to Clang clang Clang issues not falling into any other category llvm:transforms
#157559 by VigneshwarJ was merged Oct 30, 2025 Loading… updated Nov 28, 2025
[AMDGPU][NPM] Fix CFG invalidation detection in insertSimulatedTrap backend:AMDGPU
#169290 by PrasoonMishra was merged Nov 28, 2025 Loading… updated Nov 28, 2025
[AMDGPU] Remove odd syntax in some RUN lines. NFC. backend:AMDGPU skip-precommit-approval PR for CI feedback, not intended for review
#169831 by jayfoad was merged Nov 27, 2025 Loading… updated Nov 27, 2025
Previous Next
ProTip! Type g i on any issue or pull request to go back to the issue listing page.