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Revert "[Attributor] Support nested conditional branches" llvm:transforms
#170257 by c-rhodes was merged Dec 2, 2025 Loading…
Avoid maxnum(sNaN, x) optimizations / folds backend:AMDGPU backend:ARM backend:X86 llvm:analysis Includes value tracking, cost tables and constant folding llvm:globalisel llvm:instcombine Covers the InstCombine, InstSimplify and AggressiveInstCombine passes llvm:SelectionDAG SelectionDAGISel as well llvm:transforms
#170181 by LewisCrawford was merged Dec 2, 2025 Loading…
[WPD] Remove undef from tests llvm:transforms
#170179 by boomanaiden154 was merged Dec 1, 2025 Loading…
[ConstantRange] Allow casting to the same bitwidth. NFC function-specialization llvm:ir llvm:transforms
#170102 by lukel97 was merged Dec 1, 2025 Loading…
[InstCombine] Add missing constant check llvm:instcombine Covers the InstCombine, InstSimplify and AggressiveInstCombine passes llvm:transforms
#170068 by dtcxzyw was merged Dec 1, 2025 Loading…
[NFC] Fix multi-line RUN statement in a test. llvm:transforms
#170011 by mingmingl-llvm was closed Dec 1, 2025 Loading…
[WPD] Change Devirt Cutoff to use DebugCounter llvm:transforms
#170009 by boomanaiden154 was merged Dec 1, 2025 Loading…
[InstCombine] Try to infer type for Covers the InstCombine, InstSimplify and AggressiveInstCombine passes llvm:transforms
load/store when replacing memcpy llvm:instcombine #169966 by inbelic was closed Dec 1, 2025 Loading…
[AggressiveInstCombine] Fix memory location for alias analysis llvm:transforms
#169953 by dtcxzyw was merged Dec 1, 2025 Loading…
[OMPIRBuilder] re-land cancel barriers patch #164586 clang:openmp OpenMP related changes to Clang flang:openmp flang Flang issues not falling into any other category llvm:transforms mlir:llvm mlir:openmp mlir
#169931 by tblah was merged Dec 1, 2025 Loading…
Revert "[OMPIRBuilder] always leave PARALLEL via the same barrier" clang:openmp OpenMP related changes to Clang flang:openmp flang Flang issues not falling into any other category llvm:transforms mlir:llvm mlir:openmp mlir
#169829 by tblah was merged Nov 27, 2025 Loading…
[VPlan] Use wide IV if scalar lanes > 0 are used with scalable vectors. llvm:transforms vectorizers
#169796 by fhahn was merged Dec 1, 2025 Loading…
[VPlan] Optimize LastActiveLane to EVL - 1 backend:RISC-V llvm:transforms vectorizers
#169766 by lukel97 was merged Nov 27, 2025 Loading…
[IndVarSimplify] Refactor
handleFloatingPointIV, modernize pass (NFC) llvm:transforms #169706 by antoniofrighetto was merged Nov 28, 2025 Loading…
[MapVector] Introduce {keys,values} iterators llvm:adt llvm:transforms vectorizers
#169675 by artagnon was merged Dec 1, 2025 Loading…
[LoadStoreVectorizer] Fix one-element vector handling backend:AMDGPU llvm:transforms vectorizers
#169671 by cmc-rep was merged Nov 27, 2025 Loading…
[AArch64][ARM] Move ARM-specific InstCombine transforms into Covers the InstCombine, InstSimplify and AggressiveInstCombine passes llvm:transforms
Transforms/Utils backend:AArch64 backend:ARM llvm:instcombine #169589 by valadaptive was merged Dec 2, 2025 Loading…
[rtsan] Handle attributed IR function declarations compiler-rt:sanitizer llvm:transforms
#169577 by davidtrevelyan was merged Dec 1, 2025 Loading…
Revert "Redesign Straight-Line Strength Reduction (SLSR) (#162930)" backend:AMDGPU backend:NVPTX llvm:transforms
#169546 by lialan was merged Nov 25, 2025 Loading…
[SCCP] Handle llvm.experimental.get.vector.length calls function-specialization llvm:transforms
#169527 by lukel97 was merged Dec 1, 2025 Loading…
[PGO] Add missing target datalayout in test llvm:transforms
#169520 by jdenny-ornl was merged Nov 25, 2025 Loading…
[VPlan] Improve code in VPInstruction::generate (NFC) llvm:transforms vectorizers
#169470 by artagnon was merged Dec 1, 2025 Loading…
[VPlan] Include flags in VectorPointerRecipe::printRecipe backend:RISC-V llvm:transforms vectorizers
#169466 by artagnon was merged Nov 25, 2025 Loading…
[VPlan] Use DL index type consistently for GEPs backend:PowerPC backend:RISC-V llvm:transforms vectorizers
#169396 by artagnon was merged Nov 26, 2025 Loading…
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