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[LoopUnroll] Add NUW to IV increment introduced by runtime unrolling. backend:PowerPC llvm:transforms
#83246 opened Feb 28, 2024 by fhahn Loading… updated Feb 29, 2024
[DAGCombiner] Combine frem into fdiv+ftrunc+fma backend:AArch64 backend:PowerPC backend:X86 llvm:SelectionDAG SelectionDAGISel as well
#67642 opened Sep 28, 2023 by ecnelises Loading… updated Mar 15, 2024
[PPC] generate stxvw4x/lxvw4x on P7 backend:PowerPC
#87049 opened Mar 29, 2024 by chenzheng1030 Loading… updated Apr 2, 2024
[LegalizeTypes][X86][PowerPC] Use shift by 1 instead of adding a value to itself to double. backend:PowerPC backend:X86 llvm:SelectionDAG SelectionDAGISel as well
#86857 opened Mar 27, 2024 by topperc Loading… updated Apr 11, 2024
[SelectionDAG] Fold (icmp eq/ne (shift X, C), 0) -> (icmp eq/ne X, 0) backend:ARM backend:PowerPC llvm:SelectionDAG SelectionDAGISel as well
#88801 opened Apr 15, 2024 by bjope Loading… updated May 8, 2024
[PowerPC][XCOFF] Handle non-zero addend in relocation to external toc-data symbol backend:PowerPC llvm:mc Machine (object) code
#94444 opened Jun 5, 2024 by bzEq Loading… updated Jun 5, 2024
[SDAG] Heed enableAggressiveFMAFusion when folding fma(a,b,c*d)+e backend:AArch64 backend:AMDGPU backend:PowerPC llvm:SelectionDAG SelectionDAGISel as well
#94209 opened Jun 3, 2024 by jayfoad Loading… updated Jun 13, 2024
[llvm][test] Fix filecheck annotation typos [2/n] backend:AArch64 backend:AMDGPU backend:ARM backend:loongarch backend:m68k backend:NVPTX backend:PowerPC backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 coroutines C++20 coroutines debuginfo llvm:analysis Includes value tracking, cost tables and constant folding llvm:binary-utilities llvm:globalisel llvm:mc Machine (object) code llvm:transforms PGO Profile Guided Optimizations
#95433 opened Jun 13, 2024 by klensy Loading… updated Jun 13, 2024
[FPEnv][PowerPC] Correct one more strictfp test. backend:PowerPC
#94793 opened Jun 7, 2024 by kpneal Loading… updated Jun 14, 2024
[LICM] Promote conditional, loop-invariant memory accesses to scalars with intrinsic backend:AArch64 backend:AMDGPU backend:PowerPC llvm:ir llvm:transforms
#93999 opened May 31, 2024 by ii-sc Loading… updated Jun 28, 2024
[clang] Improve diagnostics for constraints of inline asm (NFC) backend:AArch64 backend:AMDGPU backend:ARM backend:DirectX backend:loongarch backend:m68k backend:MSP430 backend:PowerPC backend:RISC-V backend:Sparc backend:SystemZ backend:WebAssembly clang:codegen IR generation bugs: mangling, exceptions, etc. clang:frontend Language frontend issues, e.g. anything involving "Sema" clang Clang issues not falling into any other category
#96363 opened Jun 21, 2024 by e-kud Loading… updated Jun 28, 2024
[SDAG] Drop select -> fmax/min folding in SelectionDAGBuilder backend:AArch64 backend:AMDGPU backend:ARM backend:PowerPC backend:SystemZ llvm:SelectionDAG SelectionDAGISel as well
#93575 opened May 28, 2024 by dtcxzyw Loading… updated Jul 2, 2024
[MachineCopyPropagation, Scheduler] Detect and fix suboptimal instruction order to enable optimizations backend:AArch64 backend:AMDGPU backend:loongarch backend:PowerPC backend:SystemZ backend:X86 llvm:globalisel llvm:regalloc
#98087 opened Jul 8, 2024 by spaits Loading… updated Aug 7, 2024
[PowerPC] Generate one branch instruction if one block is required backend:PowerPC
#105662 opened Aug 22, 2024 by budimirarandjelovichtec Loading… updated Aug 27, 2024
[EarlyIfConversion] Determine if branch is predictable using new APIs. backend:AArch64 backend:PowerPC
#95877 opened Jun 18, 2024 by mgudim Loading… updated Sep 14, 2024
[llvm] Prefer StringRef::substr(0, N) to slice(0, N) (NFC) backend:ARM backend:PowerPC backend:RISC-V backend:X86 llvm:adt llvm:binary-utilities llvm:mc Machine (object) code llvm:support tablegen
#113793 opened Oct 27, 2024 by kazutakahirata Loading… updated Oct 31, 2024
[GlobalSel][NFC] Remove LLT initializers taking scalar sizes backend:AArch64 backend:AMDGPU backend:PowerPC backend:RISC-V backend:X86 llvm:globalisel tablegen
#119725 opened Dec 12, 2024 by tgymnich Loading… updated Dec 17, 2024
[LLVM] Slay undead copysign code backend:PowerPC backend:SystemZ backend:WebAssembly llvm:ir llvm:SelectionDAG SelectionDAGISel as well
#111269 opened Oct 6, 2024 by workingjubilee Loading… updated Dec 21, 2024
[TRI] Remove reserved registers in getRegPressureSetLimit backend:AMDGPU backend:ARM backend:loongarch backend:NVPTX backend:PowerPC backend:X86 llvm:globalisel llvm:regalloc llvm:transforms tablegen
#118787 opened Dec 5, 2024 by wangpc-pp Loading… updated Jan 10, 2025
[IR][AsmParser] Revamp how floating-point literals work in LLVM IR. backend:AArch64 backend:AMDGPU backend:ARM backend:DirectX backend:Hexagon backend:loongarch backend:NVPTX backend:PowerPC backend:RISC-V backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 clang:openmp OpenMP related changes to Clang clang Clang issues not falling into any other category debuginfo HLSL HLSL Language Support llvm:adt llvm:analysis Includes value tracking, cost tables and constant folding llvm:globalisel llvm:instcombine Covers the InstCombine, InstSimplify and AggressiveInstCombine passes llvm:ir llvm:support llvm:transforms
#121838 opened Jan 6, 2025 by jcranmer-intel Loading… updated Jan 22, 2025
[clang][test] Fix filecheck annotation typos backend:PowerPC backend:RISC-V backend:X86 clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' clang:openmp OpenMP related changes to Clang clang Clang issues not falling into any other category clang-tidy clang-tools-extra
#93193 opened May 23, 2024 by klensy Loading… updated Feb 3, 2025
[VPlan] Delay adding canonical IV increment. backend:PowerPC backend:RISC-V llvm:transforms vectorizers
#82270 opened Feb 19, 2024 by fhahn Loading… updated Feb 5, 2025
[Sanitizers] the access size (8 bytes) exceeds the max lock-free size (4 bytes) for 32-bit backend:PowerPC clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' clang Clang issues not falling into any other category compiler-rt:sanitizer compiler-rt
#125388 opened Feb 2, 2025 by honeygoyal Loading… updated Feb 7, 2025
[llvm][test] Fix filecheck annotation typos [1.5/n] backend:AArch64 backend:ARM backend:Hexagon backend:loongarch backend:m68k backend:NVPTX backend:PowerPC backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 coroutines C++20 coroutines debuginfo llvm:analysis Includes value tracking, cost tables and constant folding llvm:binary-utilities llvm:instcombine Covers the InstCombine, InstSimplify and AggressiveInstCombine passes llvm:mc Machine (object) code llvm:transforms PGO Profile Guided Optimizations
#94857 opened Jun 8, 2024 by klensy Loading… updated Feb 7, 2025
[llvm][test] Fix filecheck annotation typos [1/n] backend:AArch64 backend:AMDGPU backend:ARM backend:Hexagon backend:loongarch backend:m68k backend:NVPTX backend:PowerPC backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 coroutines C++20 coroutines debuginfo llvm:analysis Includes value tracking, cost tables and constant folding llvm:binary-utilities llvm:instcombine Covers the InstCombine, InstSimplify and AggressiveInstCombine passes llvm:mc Machine (object) code llvm:transforms PGO Profile Guided Optimizations
#93673 opened May 29, 2024 by klensy Loading… updated Feb 8, 2025
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