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Pull requests: llvm/llvm-project
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[aarch64] Mix the frame pointer with the stack cookie when protecting the stack backend:AArch64 backend:X86 llvm:codegen llvm:globalisel llvm:SelectionDAG SelectionDAGISel as well
#161114 opened Sep 29, 2025 by PanTao2 Loading… updated Dec 2, 2025
[MTE] Add an attribute to opt-in memory tagging of global variables while using fsanitize=memtag-globals (#166380) clang:codegen IR generation bugs: mangling, exceptions, etc. clang:frontend Language frontend issues, e.g. anything involving "Sema" clang Clang issues not falling into any other category llvm:codegen
#168535 opened Nov 18, 2025 by tarcisiofischer Loading… updated Dec 2, 2025
Skip stack protectors on alloca's which have new metadata to opt out backend:AArch64 llvm:codegen
#170229 opened Dec 2, 2025 by cooperp Loading… updated Dec 2, 2025
Fixes simple issue found static analyzer backend:AArch64 backend:PowerPC debuginfo llvm:codegen llvm:globalisel llvm:transforms
#169958 opened Nov 28, 2025 by Seraphimt Loading… updated Dec 2, 2025
10 tasks
[MachineBasicBlock] Don't split loop header successor if the terminator is unanalyzable backend:NVPTX llvm:codegen
#170146 opened Dec 1, 2025 by XChy Loading… updated Dec 1, 2025
[WoA] Remove extra barriers after ARM LSE instructions with MSVC backend:AArch64 llvm:codegen
#169596 opened Nov 26, 2025 by UsmanNadeem Loading… updated Dec 1, 2025
[Draft] Support save/restore point splitting in shrink-wrap backend:AArch64 backend:AMDGPU backend:ARM backend:Hexagon backend:NVPTX backend:PowerPC backend:RISC-V backend:WebAssembly backend:X86 debuginfo llvm:codegen llvm:globalisel tools:llvm-reduce
#119359 opened Dec 10, 2024 by enoskova-sc Loading… updated Dec 1, 2025
[profcheck] Fix missing profile metadata in ExpandMemCmp llvm:codegen llvm:transforms
#169979 opened Nov 29, 2025 by jinhuang1102 Loading… updated Dec 1, 2025
[AMDGPU] Invert scc uses to delete s_cmp_eq* backend:AMDGPU llvm:codegen
#167382 opened Nov 10, 2025 by LU-JOHN Loading… updated Dec 1, 2025
[llvm][DebugInfo] Allow DIDerivedType as a bound in DISubrangeType debuginfo llvm:codegen llvm:ir
#165880 opened Oct 31, 2025 by tromey Loading… updated Dec 1, 2025
[RegAlloc] Remove redundant parameters for weightCalcHelper (NFC). llvm:codegen llvm:regalloc
#170151 opened Dec 1, 2025 by hstk30-hw Loading… updated Dec 1, 2025
[RegisterCoalescer] The COPY with the implicit-def of super register is not coalescable. backend:X86 llvm:codegen llvm:regalloc
#169997 opened Nov 29, 2025 by dianqk Loading… updated Dec 1, 2025
[RegisterCoalescer] Don't commute two-address instructions which only define a subregister backend:SystemZ backend:X86 llvm:codegen llvm:regalloc
#169031 opened Nov 21, 2025 by KRM7 Loading… updated Dec 1, 2025
[PHIElimination] Declare MachineLoopInfo dependency for Legacy PM backend:AMDGPU llvm:codegen llvm:regalloc
#169693 opened Nov 26, 2025 by PrasoonMishra Loading… updated Dec 1, 2025
[RFC][LLVM] Emit dwarf data for changed-signature and new functions debuginfo llvm:codegen llvm:transforms
#165310 opened Oct 27, 2025 by yonghong-song Loading… updated Nov 29, 2025
[InterleavedAccess] Construct interleaved access store with shuffles backend:AArch64 llvm:codegen llvm:transforms
#167737 opened Nov 12, 2025 by ram-NK Loading… updated Nov 28, 2025
[ISel] Introduce llvm.clmul intrinsic backend:RISC-V llvm:codegen llvm:ir llvm:SelectionDAG SelectionDAGISel as well
#168731 opened Nov 19, 2025 by artagnon Loading… updated Nov 28, 2025
[GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) backend:AArch64 backend:AMDGPU llvm:codegen llvm:globalisel llvm:SelectionDAG SelectionDAGISel as well tablegen
#155107 opened Aug 23, 2025 by DenisGZM Loading… updated Nov 28, 2025
[regalloc][LiveRegMatrix][AMDGPU] Fix LiveInterval dangling pointers in LiveRegMatrix. backend:AMDGPU llvm:codegen llvm:regalloc
#168556 opened Nov 18, 2025 by vpykhtin Loading… updated Nov 27, 2025
[CodeGen] expand-fp: Change frem expansion criterion backend:AArch64 backend:AMDGPU backend:ARM backend:CSKY backend:Hexagon backend:loongarch backend:MIPS backend:PowerPC backend:RISC-V backend:SystemZ backend:VE backend:WebAssembly backend:X86 backend:Xtensa llvm:codegen
#158285 opened Sep 12, 2025 by frederik-h Loading… updated Nov 27, 2025
[WinEH] Fix try scopes leaking to caller on inline clang:codegen IR generation bugs: mangling, exceptions, etc. clang Clang issues not falling into any other category llvm:codegen
#167176 opened Nov 8, 2025 by MuellerMP Loading… updated Nov 27, 2025
Add llvm.protected.field.ptr intrinsic and pre-ISel lowering. llvm:codegen llvm:ir llvm:transforms
#151647 opened Aug 1, 2025 by pcc Loading… updated Nov 27, 2025
[X86] Remove redundant TEST after shifts when count is non-zero backend:X86 llvm:codegen llvm:SelectionDAG SelectionDAGISel as well
#169069 opened Nov 21, 2025 by GrumpyPigSkin Loading… updated Nov 26, 2025
[LowerMemIntrinsics] Optimize memset lowering backend:AMDGPU backend:NVPTX backend:SPIR-V llvm:codegen llvm:globalisel llvm:transforms
#169040 opened Nov 21, 2025 by ritter-x2a Loading… updated Nov 26, 2025
[AtomicExpand] Add bitcasts when expanding load atomic vector backend:ARM backend:X86 llvm:codegen llvm:SelectionDAG SelectionDAGISel as well llvm:transforms
#148900 opened Jul 15, 2025 by jofrn Loading… updated Nov 26, 2025
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