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[RegAlloc] Remove default restriction on non-trivial rematerialization backend:AArch64 backend:ARM backend:RISC-V backend:SystemZ backend:X86 llvm:codegen llvm:globalisel
#159211 by lukel97 was merged Oct 4, 2025 Loading… updated Dec 1, 2025
RuntimeLibcalls: Move VectorLibrary handling into TargetOptions clang:codegen IR generation bugs: mangling, exceptions, etc. clang Clang issues not falling into any other category llvm:analysis Includes value tracking, cost tables and constant folding llvm:codegen llvm:ir
#167996 by arsenm was merged Nov 14, 2025 Loading… updated Dec 1, 2025
Revert "[RegAlloc] Relax the split constrain on MBB prolog" backend:AMDGPU backend:X86 llvm:codegen llvm:regalloc
#169990 by ronlieb was merged Nov 29, 2025 Loading… updated Nov 29, 2025
[ShrinkWrap] Modify shrink wrapping to accommodate functions terminated by no-return blocks backend:AArch64 llvm:codegen
#167548 by cofibrant was merged Nov 27, 2025 Loading… updated Nov 29, 2025
Reland "RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG" backend:AArch64 backend:loongarch backend:PowerPC backend:X86 llvm:codegen llvm:globalisel llvm:regalloc
#168353 by sdesmalen-arm was merged Nov 24, 2025 Loading… updated Nov 29, 2025
[RegAlloc] Relax the split constrain on MBB prolog backend:AMDGPU backend:X86 llvm:codegen llvm:regalloc
#168259 by LuoYuanke was merged Nov 28, 2025 Loading… updated Nov 29, 2025
[dwarf] make dwarf fission compatible with RISCV relaxations backend:RISC-V clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' clang:frontend Language frontend issues, e.g. anything involving "Sema" clang Clang issues not falling into any other category debuginfo llvm:codegen llvm:mc Machine (object) code
#164128 by daniilavdeev was closed Nov 28, 2025 Loading… updated Nov 28, 2025
Revert "[ShrinkWrap] Modify shrink wrapping to accommodate functions terminated by no-return blocks" backend:AArch64 llvm:codegen
#169852 by asb was merged Nov 27, 2025 Loading… updated Nov 27, 2025
Add IR and codegen support for deactivation symbols. backend:AArch64 llvm:codegen llvm:globalisel llvm:ir llvm:SelectionDAG SelectionDAGISel as well tablegen
#133536 by pcc was merged Nov 26, 2025 Loading… updated Nov 26, 2025
CodeGen: Remove PointerLikeRegClass handling from codegen backend:AMDGPU backend:SystemZ llvm:codegen llvm:globalisel llvm:mc Machine (object) code llvm:SelectionDAG SelectionDAGISel as well tablegen tools:llvm-exegesis
#159883 by arsenm was merged Nov 26, 2025 Loading… updated Nov 26, 2025
CodeGen: Make target overrides of PointerLikeRegClass mandatory backend:AMDGPU backend:SystemZ llvm:codegen llvm:globalisel llvm:mc Machine (object) code llvm:SelectionDAG SelectionDAGISel as well tablegen
#159882 by arsenm was merged Nov 26, 2025 Loading… updated Nov 26, 2025
CodeGen: Make all targets override pseudos with pointers backend:AArch64 backend:AMDGPU backend:ARM backend:CSKY backend:DirectX backend:Hexagon backend:Lanai backend:loongarch backend:m68k backend:MIPS backend:MSP430 backend:NVPTX backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 backend:Xtensa llvm:codegen llvm:globalisel llvm:mc Machine (object) code llvm:SelectionDAG SelectionDAGISel as well tablegen
#159881 by arsenm was merged Nov 26, 2025 Loading… updated Nov 26, 2025
[dwarf] make dwarf fission compatible with RISCV relaxations 2/2 backend:RISC-V debuginfo llvm:codegen
#164813 by daniilavdeev was merged Nov 26, 2025 Loading… updated Nov 26, 2025
[dwarf] make dwarf fission compatible with RISCV relaxations 1/2 backend:RISC-V debuginfo llvm:codegen llvm:mc Machine (object) code
#166597 by daniilavdeev was merged Nov 25, 2025 Loading… updated Nov 25, 2025
CodeGen: Move libcall lowering configuration to subtarget backend:AArch64 backend:AMDGPU backend:ARM backend:DirectX backend:Hexagon backend:Lanai backend:loongarch backend:MIPS backend:MSP430 backend:NVPTX backend:PowerPC backend:RISC-V backend:Sparc backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 backend:Xtensa llvm:codegen llvm:SelectionDAG SelectionDAGISel as well
#168621 by arsenm was merged Nov 25, 2025 Loading… updated Nov 25, 2025
[CGP] Add test with indirectbr/blockaddr llvm:codegen llvm:transforms
#165412 by marcauberer was closed Nov 5, 2025 Loading… updated Nov 25, 2025
Adding Matching and Inference Functionality to Propeller-PR4: Implement matching and inference and create clusters backend:X86 llvm:codegen llvm:transforms PGO Profile Guided Optimizations
#165868 by wdx727 was merged Nov 11, 2025 Loading… updated Nov 24, 2025
Reland "[RegAlloc] Fix the terminal rule check for interfere with DstReg (#168661)" backend:AArch64 backend:AMDGPU backend:Hexagon backend:NVPTX backend:PowerPC backend:RISC-V backend:WebAssembly backend:X86 llvm:codegen llvm:globalisel llvm:regalloc
#169219 by hstk30-hw was merged Nov 24, 2025 Loading… updated Nov 24, 2025
[RegAlloc] Fix the terminal rule check for interfere with DstReg backend:AArch64 backend:AMDGPU backend:Hexagon backend:NVPTX backend:PowerPC backend:RISC-V backend:WebAssembly backend:X86 llvm:codegen llvm:globalisel llvm:regalloc
#168661 by hstk30-hw was merged Nov 23, 2025 Loading… updated Nov 23, 2025
[llvm] Use llvm::equal (NFC) llvm:codegen
#169173 by kazutakahirata was merged Nov 22, 2025 Loading… updated Nov 22, 2025
CodeGen: Remove target hook for terminal rule backend:AArch64 backend:AMDGPU backend:ARM backend:Hexagon backend:NVPTX backend:PowerPC backend:RISC-V backend:SystemZ backend:WebAssembly backend:X86 llvm:codegen llvm:regalloc
#165962 by arsenm was merged Nov 12, 2025 Loading… updated Nov 21, 2025
TargetLowering: Avoid hardcoding OpenBSD + __guard_local name llvm:codegen
#167744 by arsenm was merged Nov 21, 2025 Loading… updated Nov 21, 2025
[CFIInserter] Turn a reachable llvm_unreachable into a report_fatal_error. backend:RISC-V backend:X86 llvm:codegen
#168777 by topperc was merged Nov 20, 2025 Loading… updated Nov 20, 2025
[DebugInfo] Don't set prologue_end behind line-zero call insts debuginfo llvm:codegen
#156850 by jmorse was merged Nov 20, 2025 Loading… updated Nov 20, 2025
[GlobalMerge] add a command to force global merge backend:ARM llvm:codegen
#168231 by Zhenhang1213 was closed Nov 20, 2025 Loading… updated Nov 20, 2025
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