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    In some destructive-read technologies such as DRAM, the act of reading will leave memory in an undefined state, but in other technologies such as core, the act of reading will always set memory to a particular state. I don't know whether core read sense amplifiers would have been capable of detecting both 0-1 and 1-0 transitions, but it could have been interesting for an architecture to include an instruction which simultaneously stores a value and observes which bits changed, thus making an "exchange" operation faster than a non-destructive read. Commented Apr 14, 2021 at 15:05
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    I looked up TS in the S/360 P.Ops manual, just out of curiosity. Only bit 0 of the fetched byte is used to set the condition code, so it's effectively limited to a single bit. Also, FWIW, the original ed. of the P.Ops did not have TS, but the 7th ed. (the next one available on bitsavers) has it. Commented Apr 15, 2021 at 1:29
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    @another-dave But it sets the whole byte, right? Otehrwise I might have used it wrong for 30 years :)) Commented Apr 15, 2021 at 1:31
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    Yes - whole byte. You do not have 30 years worth of accumulated bugs to fix. Not on account of TS misuse, anyway. Commented Apr 15, 2021 at 1:43
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    I mean we only used it as x'FF' or x'00'. This was so standard, I never looked that detail up - or more likely, forgot about it. Fascinating how habit shapes knowledge. Commented Apr 15, 2021 at 10:51