The 6502 generally decides what operation is going to be doing on each memory cycle before the end of the read of the previous cycle; the primary exception to this is that "perform an operation with a specified low address, along with a high address fetched from the data bus" and "perform an operation with a specified high address, along with a low address fetched from the data bus" are available as operation choices.
The distinctions among LDA #imm, LDA zp, and STA zp are all made while the second byte of the instruction is being fetched. This is fine for any instruction which would read an immediate operand, since the CPU will know what to do with the data by the time it arrives on the bus at the end of the second cycle. In order for STA #imm to work, however, the CPU would have to know before the beginning of the second cycle that it would need to perform a write. There's no way the CPU can go back in time after it has fetched the operand byte and retroactively change that write to a read. While it might be theoretically possible to have the instruction insert a write cycle, doing so would eliminate any benefit that STA #imm could have offered.