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  • The JTAG password requirement is optional/vendor specific, none of the chips I have used required a JTAG password. Commented Sep 5, 2019 at 8:48
  • @markus-nm Non-development Intel boards typically require a JTAG password. Commented Sep 5, 2019 at 8:56
  • But JTAG is not limited to Intel chips. Virtually all ARM cortex chips are using JTAG and/or SWD. Most of them can be password protected, but none of them require that. Commented Sep 5, 2019 at 8:57
  • 2
    Agreed. Negative rings are an analogy at best. Or a metaphor. Commented Sep 5, 2019 at 9:18
  • 1
    @LTPCGO The VT-x extensions don't make a true ring (see security.stackexchange.com/a/175826/165253). It just enables vmexit and the like. A task will still be CPL0 through CPL3, VM or not. It's just that for a guest, a privileged instruction will trigger a vmexit so the hypervisor can deal with it before resuming the VM. In fact, from the perspective of individual instructions, there's no difference between being in a guest or host! Commented Sep 5, 2019 at 10:19