2

I'm using make in Windows and I'd like to read a couple of values from a file to use as variables in the makefile.

I have a file that includes the following lines:

/* A comment */ #define SOME_STRING "ABCDE" /* A comment " " */ #define BLANK_STRING " " /* A comment */ #define SOME_VERSION 01.01a01 

I'd like to end up with two variables in my makefile. One set to ABCDE and the other set to 01.01a01.

This could also be done using some bash commands called from within the makefile. I'm new to makefiles, bash and stackoverflow so please bear with me!

Thanks

Stephen

2 Answers 2

1
all: echo $(SOME_VERSION) imports: input_file sed -n 's/^#define \([^ ]*\) \("*[^"]*"*\)/\1=\2/p' input_file > imports include imports 
Sign up to request clarification or add additional context in comments.

2 Comments

Thanks, this works really well. I had to change to -include imports otherwise I receive error : imports: No such file or directory. Even with the error the import worked correctly, so the error suppression seems an acceptable solution to me.
I've decided to use this as my solution because it will cope with changes to the input_file. This is because it is making use of the name of the #define. The names of my #defines are fixed, but it would be possible for a new #define to be added. I hadn't considered this situation until seeing the solutions from @perreal and @Beta
0
VARS := $(shell sed -n "s/^\#define .* //p" filename) A = $(word 1, $(VARS)) B = $(word 2, $(VARS)) 

1 Comment

This doesn't quite work for me. I think this is because I missed a situation in my question. When SOME_STRING is blank I receive unexpected EOF while looking for matching `"'. I've updated the question to include this situation. If a blank string isn't used this works perfectly.

Start asking to get answers

Find the answer to your question by asking.

Ask question

Explore related questions

See similar questions with these tags.