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I'd like to use the first argument (target) of the make command as a value of a variable inside the Makefile so that instead of:

make var=arg1

I can do

make arg1

So that in the Makefile I can refer to it as TARGET:

$(TARGET): $(OBJS) @echo -e "\n\n\t\t*** Compiled $(TARGET) successfully! ***\n" ; $(FL) $(LFLAGS) -o $(BUILDS_DIR)$@ \ $(OBJS) \ $(LIBS) @echo -e "\n\n\t\t*** Linking $(TARGET) completed! ***\n"`

Additionally, is it possible to set TARGET to default value if make is called without an target argument?

Thanks

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  • Are you using GNU make or some other make implementation? Commented Oct 20, 2015 at 17:44
  • yes GNU make. I forgot to say it Commented Oct 20, 2015 at 20:31

1 Answer 1

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You can get a list of all command line goals from $(MAKECMDGOALS) which is a list of all targets specified on the command line (you shouldn't make the assumption that there is only one of these though...).

Alternatively, you could use the % as follows:

%: $(OBJS) @echo making $@ ...

Notice that this is a pattern rule with as long stem as possible, so it will only be executed if there is no other rule to service the command-line target (unless there is another %: rule, in which case it will only run the first). If you make multiple targets, this will be run once per target.

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it seems to work with $(MAKECMDGOALS). thanks a lot and sorry for the late reply (time zone issue). about the second option, I'd also thought of that but however I needed to set a variable TARGET and I didn't know how to do with that.

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