Using for loop variable in Makefile shell

You appear to have an order-of-execution problem. You expect make to expand the $(shell) function each time execution of the loop in the rule's recipe reaches the point where the $(shell) reference appears lexically, but if you think about it, that cannot work. make hands off each command in the recipe to the shell for it to execute, at which point it is out of make's hands. Therefore, it must (and does) expand make function calls before passing the command to the shell.

The whole for loop in your recipe is and must be a single command for this purpose (that's what the trailing backslashes are about), so the $(shell) function is expanded before the loop variable is ever set. Within that command, $tag expands to nothing.

And aside from execution order, the execution of the code in the $(shell) function happens in its own shell, where the $tag variable wouldn't be set anyway.

There are several good alternatives:

Alternative 1: Get rid of the loop

You have multiple things you want to build. Great! That's right in make's wheelhouse. Let make help you. For example:

# Note: make syntax permits whitespace around the "=" in variable assignments ARCH = amd64 ppc64le IMAGE = k8s.gcr.io/debian-base export DOCKER_CLI_EXPERIMENTAL = enabled TAGS = v1.0.0 v1.0.1 all: $(TAGS) $(TAGS): docker manifest create $(IMAGE):$@ $(shell echo $(ARCH) | sed -e "s~[^ ]*~$(IMAGE)\-&:$@~g") .PHONY: $(TAGS) 

This uses the fact that a rule with multiple targets is applied separately for building each of those targets. It does not require an explicit iteration variable because within any make recipe, the automatic variable $@ expands to the name of the target presently being built.

The $(shell) function call herein is still expanded before the command runs, but that is not a problem because the make variables within, including $@, are expanded first.

Alternative 2: Use shell command substitution instead of make's $(shell) function

It's honestly pretty obtuse to use $(shell) inside a recipe unless to intentionally make use of the order of execution properties attending that, because the shell feature on which that make function is modeled is almost always a simpler and more appropriate choice. For example:

ARCH = amd64 ppc64le IMAGE = k8s.gcr.io/debian-base export DOCKER_CLI_EXPERIMENTAL = enabled all: for tag in v1.0.0 v1.0.1 ; do \ docker manifest create $(IMAGE):$$tag $$(echo $(ARCH) | sed -e "s~[^ ]*~$(IMAGE)\-&:$$tag~g"); \ done 

After expansions, the command that make passes to the shell in that case is equivalent to^*

for tag in v1.0.0 v1.0.1 ; do \ docker manifest create k8s.gcr.io/debian-base:$tag $(echo amd64 ppc64le | sed -e "s~[^ ]*~k8s.gcr.io/debian-base\-&:$tag~g"); \ done 

In shell code, the construct $(any command) is called a "command substitution". The command inside the parentheses is executed, and its standard output is captured and substituted. Using this leaves no question about order of execution.

Alternative 3: both of the above

There's not much more to say than that it comes out like this:

ARCH = amd64 ppc64le IMAGE = k8s.gcr.io/debian-base export DOCKER_CLI_EXPERIMENTAL = enabled TAGS = v1.0.0 v1.0.1 all: $(TAGS) $(TAGS): docker manifest create $(IMAGE):$@ $$(echo $(ARCH) | sed -e "s~[^ ]*~$(IMAGE)\-&:$@~g") .PHONY: $(TAGS) 

And, I guess, that this is the alternative I like best so far. I don't particularly care for make functions generally, as they are a GNU extension, and many of them tend to produce a blurred programming paradigm. Or maybe "a programming paradigm" would be better wording, as I don't usually think of writing makefiles as "programming" per se.

Alternative 4: also improve the command substitution command

sed is a bit overkill for just appending a string to multiple other strings, and its expression syntax is a bit arcane. I'm actually very fond of sed, but for use in a makefile I value clarity very highly. For that reason, something along these lines is probably what I would do myself:

ARCH = amd64 ppc64le IMAGE = k8s.gcr.io/debian-base export DOCKER_CLI_EXPERIMENTAL = enabled TAGS = v1.0.0 v1.0.1 all: $(TAGS) $(TAGS): docker manifest create $(IMAGE):$@ $$(for arch in $(ARCH); do echo "$(IMAGE)-$$arch:$@"; done) .PHONY: $(TAGS) 

^* equivalent, but not identical, because make will perform the line joining instead of leaving that for the shell. I present the line-split version instead for easier reading.