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Questions tagged [memory-access]

1 vote
1 answer
92 views

In this lecture the professor says that $w$, the word size of a machine, and $n$, the amount of RAM in the machine, must be governed by the following relationship: $w \ge \log(n)$ But with $w$ bits we ...
robertspierre's user avatar
1 vote
1 answer
164 views

In a DRAM architecture problem, I’m given: DRAM: 16MB × 64-bit DRAM chip: 512KB × 4-bit My professor repeatedly referred to these as Mega-Bytes and Kilo-Bytes, but ...
detect1ve_pikachu's user avatar
0 votes
1 answer
59 views

Suppose we have an image of size $D\times D$ (square). Can it be stored in memory such that the maximum distance between any two neighboring pixels is less than $D+1$? The neighboring pixels are ...
Gaslight Deceive Subvert's user avatar
0 votes
1 answer
51 views

Why isn't the average access time of a cache (1-h)C and instead is hC? ,where h is the hit ratio and C is the access time of the cache? If the hit ratio is big ,then this means we have a cache hit ...
Whiter Fox's user avatar
1 vote
0 answers
45 views

I know most of those architectures added unaligned loads and stores later on, but when they first started, as far as I know, they were effectively word-aligned (faulting on any non-word aligned ...
Shermapper's user avatar
3 votes
1 answer
1k views

So I'm using NASM on linux and I was curious how this is done. All the info I can find online uses functions from C like malloc(). Can this be done purely with assembly code? Perhaps via a system call?...
Lonely Lad's user avatar
0 votes
1 answer
277 views

I have learned that initially PCs had 8-bit memory architecture and that 1 byte (i.e. 8 bits) was the "basic" memory unit because 8 bits was exactly the memory space required to encode any ...
Jan Stuller's user avatar
0 votes
1 answer
85 views

Everyone knows that the speed of the CPU is many times faster than the speed of RAM, whereas in this case the processor executes two read or write commands in memory running in a row? As I assume, due ...
Slaycapь's user avatar
1 vote
1 answer
146 views

With byte addressing, the CPU can access a single byte. But how does this access happen during alignment? As I understand it, if a CPU needs to read an unaligned byte, it reads the word starting from ...
Slaycapь's user avatar
2 votes
1 answer
235 views

I want to make a simple C program in order to measure L1, L2 and L3 latencies of my CPU. I know some info about them: ...
Agustín Núñez's user avatar
0 votes
1 answer
105 views

I don't know if I asked the question in correct way but I will try to explain what's the thing I am not getting. I am currently reading book titled "Code: The Hidden Language of Computer Hardware ...
izack's user avatar
  • 1
0 votes
1 answer
104 views

So I am covering succinct trees, and in the lecture, it mentioned that "An n-node tree takes 2n pointers or 2n lg n bits (can be easily reduced to n lg n + O(n) bits). First, question is why ...
kjkjkjkjkj's user avatar
0 votes
2 answers
215 views

Im designing my own CPU but I don't know how it jumps to an instruction that's no longer in ram. People have told me it puts the address in the SSD but for example, if the address were 3 in ram it ...
Thenboy's user avatar
  • 11
0 votes
3 answers
168 views

So I've been trying to understand endianess for the past couple of days but I'm not sure if I'm overthinking this or not and I don't have anyone I can ask to confirm things. Here is how I look at ...
Jess Chan's user avatar
  • 101
0 votes
1 answer
232 views

I'd like to know how a computer can determine the beginning and end of certain file components (attributes, headers, frame/packet/segment headers etc.) when these components can be omitted or added in ...
Inquisitive's user avatar

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