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I am simulating a phase leg configuration as shown below using a [GS66508T][1] GaN FET. Does anyone know if the circuit is working correctly according to the current plot?

There is current spike above 30 A. Will it burn the FET? If yes, will the simulation still get current even when the FET is burnt? How to interpret the Ids graph of the low-side FET?

Load current is set to 30 A. It is seen that from the purple trace, the first two slope is the load current of 30 A, but it is not afterwards.

Blue trace is high side Vgs, pink trace is low side Vgs, red trace is load current, purple trace is low side Ids.

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    \$\begingroup\$ Welcome! Only you can answer if it's working correctly as you know the requirements and what it's supposed to do. As it's currently drawn, it's a bit hard to read. Does the schematic showing the top part of the phase leg with floating gate driver? \$\endgroup\$ Commented Apr 16, 2024 at 8:14
  • \$\begingroup\$ Nope, the gate driver is modelled using SW_GDH and SW_GDL.. Blue trace is high side Vgs, while the green trace is low side Vgs of GaN FET. Red trace is the source current of low side FET while purple is the load current. Does the red trace of 36A will cause the FET to die? If yes, is the circuit still working? \$\endgroup\$ Commented Apr 16, 2024 at 10:03
  • \$\begingroup\$ Please edit all information into the question. It’s still not clear what part of your circuit does what, especially since it continues off screen. \$\endgroup\$ Commented Apr 16, 2024 at 10:35

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You've connected the load inductor wrong. As drawn in the schematic, you're applying +400V to the inductor when the low-side switch is on, and 0V when the high-side is on instead. Since the current through an inductor is proportional to the time integral of the applied voltage and you're only ever applying a positive voltage, the current will rise linearly and never go down again. This is what you're seeing in the simulation: Whenever the low-side FET is on, the current goes up. In-between, it stays roughly constant (minus the on-resistance of the FET).

You need to think again about what you actually want to simulate and then enter the schematic into the simulation tool correctly.

As to why the circuit keeps working in the simulation: The burning-up of parts isn't modeled. The simulator just assumes that the magic smoke does not escape.

Additionally, your gate drive circuitry is more than just a bit questionable. The PNP transistors don't do anything, for example. If you want to keep it simple, just connect AC voltage sources (0V/5V pulse patterns) directly between gate and source.

And yes, if you actually built this circuit, it would fail immediately.

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