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I am currently designing my 3rd year project in EE. I have an MCU with an ADC that samples at 15 kHz. The signal I want to sample has a 0.5 µs rise time which is equivalent to a bandwidth of 700 kHz, obviously I need to sample at least twice this, but I want to sample at least 2 MHz or so.

I did some research, and I discovered that I can use sample and hold circuits before my MCU. I have never used or built one. I am currently looking for a suitable IC (I need to know what specifications I should look for, etc., the acquisition time, holding time and the sorts).

Should my acquisition time be at least 2 MHz? Should the holding time be such that the output is less than the 15 Hz required by my MCU ADC? What are the relevance of these specifications when choosing a suitable S&H IC?

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Unfortunately you have a far more serious problem than a S&H circuit. If you need 2Msps (samples per second) then you need an ADC that can encode the signal at that rate. 15Ksps is far too slow by over 2 orders of magnitude. A S&H circuit won't help you, and, in any case, any decent ADC will already have a S&H built in.

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A sample and hold holds one value stable while you acquire it. To use your scheme, you would need to use many sample and holds, and control them with your microcontroller.

The only way you're going to sample at 2MHz with a microcontroller whose ADC can sample at 15kHz is to not use the onboard ADC, and look for an external ADC chip that can do what you want, and then offload the collected data.

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