Im currently trying to acheive some rough phase coherence between two rtl-sdr dongles, the dongles share a single 28.8 MHz clock signal (from V4 to V3). However, there seems to be some phase drift between the two devices which is probably due to the PLL dithering. It is possible to disable the dithering on the V3, but no documentation is available for the V4.
Is there any way to disable the dithering on the V4 or do i need to buy another V3 instead?
