ZipCPU (Dan Gisselquist) / Repositories

sdspi Public

SD-Card controller, using either SPI, SDIO, or eMMC interfaces

spi-interface fpga verilog sd-card sdio wishbone verilog-components

Verilog 362 57 Updated Mar 15, 2026
wb2axip Public

Bus bridges and other odds and ends

fpga gplv3 xilinx wishbone xilinx-vivado wishbone-bus axi-bus

Verilog 657 126 Updated Mar 10, 2026
website Public

The ZipCPU blog

blog learning tutorial fpga verilog verilator zipcpu

HTML 18 8 Updated Dec 17, 2025
zipcpu Public

A small, light weight, RISC CPU soft core

cpu fpga verilog cross-compiler wishbone soft-core verilator

Verilog 1,529 179 Updated Dec 8, 2025
wbsata Public

Wishbone SATA Controller

Verilog 25 3 GNU General Public License v3.0 Updated Oct 16, 2025
eth10g Public

10Gb Ethernet Switch

C 259 32 GNU General Public License v3.0 Updated Oct 16, 2025
vgasim Public

A Video display simulator

video fpga gplv3 verilog gtkmm vga verilator

Verilog 177 23 Updated May 16, 2025
kimos Public

Enclustra Mercury demonstration project

C 10 GNU General Public License v3.0 Updated Feb 27, 2025
axidmacheck Public

AXI DMA Check: A utility to measure DMA speeds in simulation

Verilog 15 8 Updated Jan 22, 2025
autofpga Public

A utility for Composing FPGA designs from Peripherals

c-plus-plus fpga verilog wishbone verilator wishbone-bus

C++ 187 23 GNU General Public License v3.0 Updated Dec 23, 2024
qoiimg Public

Quite OK image compression Verilog implementation

Verilog 23 2 GNU General Public License v3.0 Updated Nov 27, 2024
videozip Public

A ZipCPU SoC for the Nexys Video board supporting video functionality

fpga gplv3 verilog hdmi soc system-on-chip verilator

Verilog 20 1 Updated Nov 13, 2024
cordic Public

A series of CORDIC related projects

fpga dsp verilog dds cordic

C++ 121 26 Updated Nov 12, 2024
wbspi Public

A collection of SPI related cores

Verilog 21 6 Updated Nov 12, 2024
wbi2c Public

Wishbone controlled I2C controllers

fpga i2c gplv3 verilog verilator i2c-slave wishbone-bus

Verilog 57 13 Updated Nov 12, 2024
xtimesheet Public

A very simple timesheet tracking program using text files and a GTK/Glade interface

c-plus-plus timesheet gtkmm glade time-tracker

C++ 2 GNU General Public License v3.0 Updated Jun 25, 2024
interpolation Public

Digital Interpolation Techniques Applied to Digital Signal Processing

fpga interpolation dsp verilog verilator interpolation-methods interpolation-techniques

Verilog 68 13 Updated Jun 24, 2024
dblclockfft Public

A configurable C++ generator of pipelined Verilog FFT cores

fpga gplv3 verilog fft verilog-components verilator

C++ 256 42 Updated Apr 18, 2024
fftdemo Public

A demonstration showing how several components can be compsed to build a simulated spectrogram

Verilog 47 9 Updated Apr 15, 2024
wbuart32 Public

A simple, basic, formally verified UART controller

fpga verilog uart serialport uart-verilog wishbone verilator

Verilog 329 56 GNU General Public License v3.0 Updated Jan 29, 2024
dbgbus Public

A collection of debugging busses developed and presented at zipcpu.com

verilog debugging-tools wishbone fgpa verilator wishbone-bus

Verilog 43 7 Updated Jan 18, 2024
sdr Public

A basic Soft(Gate)ware Defined Radio architecture

Verilog 102 18 Updated Jan 18, 2024
dspfilters Public

A collection of demonstration digital filters

fpga gplv3 dsp filter verilog lfsr demonstration-filters

Verilog 167 38 Updated Jan 18, 2024
dpll Public

A collection of phase locked loop (PLL) related projects

fpga gplv3 verilog verilator pll

Verilog 118 28 Updated Jan 18, 2024
rtcclock Public

A Real Time Clock core for FPGA's

Verilog 28 5 Updated Jan 17, 2024
openarty Public

An Open Source configuration of the Arty platform

fpga fpga-soc wishbone verilator arty zipcpu wishbone-bus

Verilog 131 24 Updated Jan 17, 2024
wbfmtx Public

A wishbone controlled FM transmitter hack

fpga hack verilog wishbone verilog-components wishbone-bus fm-transmitter

Verilog 24 3 Updated Jan 16, 2024
wbpwmaudio Public

A wishbone controlled PWM (audio) controller

Verilog 18 6 Updated Jan 16, 2024
wbscope Public

A wishbone controlled scope for FPGA's

fpga verilog debugging-tools wishbone verilator wishbone-bus

Verilog 89 7 Updated Jan 12, 2024
qspiflash Public

A set of Wishbone Controlled SPI Flash Controllers

Verilog 98 26 Updated Oct 31, 2022

Dan Gisselquist ZipCPU

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sdspi Public

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wb2axip Public

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website Public

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zipcpu Public

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wbsata Public

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eth10g Public

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vgasim Public

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kimos Public

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axidmacheck Public

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autofpga Public

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qoiimg Public

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videozip Public

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cordic Public

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wbspi Public

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wbi2c Public

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xtimesheet Public

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interpolation Public

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dblclockfft Public

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fftdemo Public

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wbuart32 Public

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dbgbus Public

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sdr Public

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dspfilters Public

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dpll Public

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rtcclock Public

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openarty Public

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wbfmtx Public

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wbpwmaudio Public

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wbscope Public

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qspiflash Public

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