The emulator provides the following feature set:

• instruction breakpoints (which pause the target processor)
• memory read/write breakpoints (which pause the target processor)
• instruction watches (which are non-intrusive)
• memory read/write watches (which are non-intrusive)
• breakpoints and watches optionally support an address mask, so can cover a block of addresses
• single stepping/tracing every N instructions
• live disassembly when single stepping
• read/write individual target memory locations
• display the processor registers
• hex/ascii dump of a block of host memory
• disassembly of a block of host memory
• calculate a CRC of a block of host memory
• destructive memory test of a block of host memory
• two external trigger inputs, which can be used independently or can be used to make a breakpoint/watch conditional
• a 24-bit processor cycle counter (that is accurate even when single stepping/paused with breakpoints)