An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

FireSim: Fast and Effortless FPGA-accelerated Hardware Simulation with On-Prem and Cloud Flexibility

Software workload management tool for RISC-V based SoC research. This is the default workload management tool for Chipyard and FireSim.

BRU: Bandwidth Regulation Unit for Real-Time Multicore Processors

Chisel 6 and FIRRTL 2 wrapper for MoSAIC to integrate into FireSim