Questions tagged [cpu-cache]
A fast memory limited in space close to the CPU. A cache is designed to reduce the average time to access memory.
252 questions
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1 answer
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Cache Mapping Question
My question is, how can I get the line number just by dividing the number by the cache line size(64)? For example, let's take 510, 510 in binary is 000000000(00111)111110 , so 00111 is show the line ...
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1 answer
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Using block size, associativity and cache size to find the length of offset and index
From my understanding: A block is the size of the smallest unit stored by the cache (normally a collection of words due to spatial locality). The block size is the number of bytes per block. A set is ...
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Spatial locality and virtual vs physical memory
I want to make sure that I correctly understand spatial locality & how it relates to hardware with an example: Assume that we have two objects in memory in a program running on a modern 64-bit ...
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Compare average memory access times of a block(Memory management)
I am studying for a exam and I have this following question I cannot answer. A direct mapped cache has a hit ratio of 0,8 and access time of 10ns while a 4 way associative cache has a hit ratio of 0,...
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1 answer
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Equation for access time confuses me
Why isn't the average access time of a cache (1-h)C and instead is hC? ,where h is the hit ratio and C is the access time of the cache? If the hit ratio is big ,then this means we have a cache hit ...
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3 answers
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Cache Page vs. Memory Page
I'm learning about caching, and currently have some degree of familiarity with main memory and paging. While reading this this Intel paper, I'm confused about the term "cache pages". I know ...
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2 answers
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How is two way set associative cache better than a direct mapped cache?
I'm trying to learn computer architecture now on my own, and while I understand how two way set associative cache and direct mapped (one way) cache works from watching videos, it's not clearly what ...
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1 answer
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Is this David Patterson 'Computer Architecture A Quantitative Approach' scheme right?
My guess is that L1 cache tag is also 28 bits as the L1 tag compare adress. Another question is why the offset is going to CPU? And the last one What other improvements and errors does this memory ...
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Inverting position of MMU and cache inside a computer
I was thinking about a topic in my actual course and a question came to my mind. What would happen if, at the hardware level, the position of the MMU and the cache were reversed inside a computer? ...
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1 vote
1 answer
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MIPS: How can the least 2 significant bits of a 32-bit address specify a byte?
I was reading Computer Architecture Organization and Design by David A. Patterson and John L. Hennessy. Specifically, I was reading chapter 5, section 5.3, Basics of Caches. I read the following ...
2 votes
1 answer
235 views
Measuring Cache Access Time
I want to make a simple C program in order to measure L1, L2 and L3 latencies of my CPU. I know some info about them: ...
2 votes
0 answers
149 views
What is dynamic biased cache replacement policy?
The Arm documentation for Cortex-A76 (Raspberry Pi 5) says the L2 cache replacement policy is "dynamic biased". But what is it? More precisely: How does it works? Why not using pseudo-LRU, ...
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1 answer
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Cache Miss in First Private Cache but Hit in Shared LEvel 2 Cache: Does it Result in a Penalty?
In the context of Shared Memory Multiprocessor (SMP) systems with different cache levels, if a cache miss occurs in the first private cache but is followed by a hit in the second shared cache, would ...
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2 votes
2 answers
398 views
Is loading from L2 or L3 of multi level cache direct or require a transfer to L1
(This is mainly about reads, and commercial products not hypothetical machines.) When loading a CPU register with data contained in L2 or L3 of a multi-level cache. Can the data that is in L2 or L3 ...
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1 answer
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Associative memory addressing
I would like to understand better how associative memory works.In associative memory we have the tag and the actual data being stored.The tag describes where the data came from but what does this mean ...
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