Timeline for Different implementation between FPGA and CPLD?
Current License: CC BY-SA 4.0
9 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Mar 5 at 6:30 | comment | added | greybeard | "FPGAs also contains [extras]" devices may contain extras. One abstraction of early FPGAs I fondly remember: an array of GAL4V2 in a sea of configurable routing. | |
| Mar 4 at 21:39 | comment | added | Tyassin | Yes he sure did. | |
| Mar 4 at 21:39 | vote | accept | Tyassin | ||
| Mar 4 at 20:32 | comment | added | Stefan Wyss | TonyM already provided a good answer. | |
| Mar 4 at 20:20 | comment | added | Tyassin | @StefanWyss I can try. A CPLD have macrocells which are build up by pure logic gates. Whereas a FPGA also have logic gates, but also LUTs which are much more flexible. FPGAs also contains DSPs, RAM and multipliers. | |
| Mar 4 at 20:05 | history | edited | toolic | CC BY-SA 4.0 | added 2 characters in body |
| Mar 4 at 19:56 | answer | added | TonyM | timeline score: 4 | |
| Mar 4 at 18:50 | comment | added | Stefan Wyss | If you can tell me what the difference is between a CPLD and an FPGA, then I can tell you in which one your logic works better. Deal? | |
| Mar 4 at 15:58 | history | asked | Tyassin | CC BY-SA 4.0 |