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I am supposed to design a T flip flop using logic gates (asynchronous sequential circuit) and also draw the state diagram. I don't really understand why the output doesn't change from 0 to 1 when there is a transition from B to D in the given figure below, because for the T flip flop the state 11 causes toggle action, doesn't it? Can someone help me figure this out.

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Truth table for T flip flop:

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    \$\begingroup\$ Welcome to EE.SE! This appears to be a homework question. As such, you need to show us your work so far, and explain which part of the question you're having trouble with. For future reference: Homework questions on EE.SE enjoy/suffer a special treatment. We don't provide complete answers, we only provide hints or Socratic questions, and only when you have demonstrated sufficient effort of your own. Otherwise, we would be doing you a disservice, and getting swamped by homework questions at the same time. See also here. \$\endgroup\$ Commented Nov 25, 2018 at 12:58

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No, it's the 1→0 transition of P (TP = 10) that causes the output to toggle.

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