I'm trying to simulate charging of one capacitor \$C_2\$ by another \$C_1\$ using LTspice. Following the derivations in this video, I found that in the end, both capacitors \$C_1\$ and \$C_2\$ should end up with a voltage of \$ \frac{C_1*V_0}{C_1 + C_2} \$, where \$V_0\$ is the voltage to which \$C_1\$ is initially charged. I have attached figures here showing my simulation and my result.
Initially, \$C_1\$ and \$C_2\$ are both at 0 V, as expected. After 10 ms, when S1 is closed, \$C_1\$ charges. With a time constant of 1 ms, \$C_1\$ charges fully in about 5 ms, as expected. After 20 ms, S2 is opened back up, and, as expected, \$C_2\$ retains its charge. (At this point, \$C_2\$ has already begun to charge slightly, which contradicts my expectations.) After 30 ms, when S2 is closed (while S1 is still open), I expect \$C_2\$ to charge up while \$C_1\$ discharges until they meet somewhere in the middle. However, I see a rapid drop in voltage on \$C_1\$ and a sharp increase and decrease in voltage on \$C_2\$.
I am not sure why this is but I have tried a couple of modifications. First I added a 1 k-ohm resistor in series with C2. The simulation and results are shown below. I'm not sure why how or why closing S2 causes the voltage on \$C_1\$ to change so rapidly (that too, for \$C_1\$, up to 16 V, which is well beyond the voltage Vin = 5V to which the capacitor was charged) and why the simulation abruptly stops displaying the voltage across \$C_2\$ at around 33 ms.
Finally, I decided to try a buffer amplifier instead of a resistor. The simulation and results are shown below. I'm again unable to explain why the voltages across \$C_1\$ and \$C_2\$ behave so erratically.
Could someone please explain what prevents the second capacitor from charging off the first?
Is there a way I could modify my simulation to get this to work?
This is actually a small part of a much larger circuit that I need to get working, so any help would be greatly appreciated.










