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i have narrow pulse of width 10ns repeating at 20us rate to be processed coming from a photo diode, so i have used a very high GBWP opamp like below,as my interest is to work at 100Mhz as pulse is 10ns, i have managed to get a pole at 100MHz using 1K resistor and 1.6p capacitor in the first stage while having a gain of 1K

schematic

simulate this circuit – Schematic created using CircuitLab

but when it comes to the second stage my gain curve is flat when i use a 100femto capacitor and also 1.6p, with a different phase response here

enter image description here

one can see that first graph is a 100fF response and second is a 1.6p response,

how to calculate the feedback capacitor of the second stage,

when i observe the pulse response, the 100fF response is quite sharp while the 1.6p response quite expanded pulse output

why a 100fF is a better suit here

more importantly is a 100f capacitor, how practical it is on a PCB board

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    \$\begingroup\$ 1 fF = 0.001 pF. 100 fF = 0.1 pF. That's very very small. You are well down into stray capacitance and layout altering capacitance. Not undoable but super crucial to engineer. And the OPA699 looks like it's at the outer edge of its capabilities with a gain of 10 at 10 ns pulses. | Compensation is discussed in the datasheet from about p16 on. The examples suggest to me that you will be "lucky" to achieve the gains you are aiming at. \$\endgroup\$ Commented Sep 11, 2016 at 13:38
  • \$\begingroup\$ It would be possible to make an embedded capacitor that would be +/- perhaps 20% using small lands on adjacent layers. As Russell notes, this value of capacitance would take a great deal of care to ensure it really is that value. \$\endgroup\$ Commented Sep 11, 2016 at 15:59
  • \$\begingroup\$ @Russell McMahon i think i will be having tough time, because i have 30 these stages on board, from your words it seems even 1.6pF is also a fairly worrying value, i am really clue less about what will be the stray / parasitic capacitance on board, if it adds up, it will badly effect my gain ! \$\endgroup\$ Commented Sep 11, 2016 at 16:30
  • \$\begingroup\$ It is going to add up: a parallel plate with 1 mm^2 area and 1.5mm thick board has 50fF of capacitance. I think it is likely doable, but it is likely to be very difficult. What is your application? \$\endgroup\$ Commented Sep 11, 2016 at 16:50
  • \$\begingroup\$ @kakeh I have proper regard for analysis and theoretical derivations, but such work often requires experience, expensive equipment & significant effort. These all have their place and in some cases may be required but, where possible, "standing on the shoulders of giants" can be a good idea. If I was wishing to achieve such results I would look for "prior art" in the form of application notes from known competent sources and by looking at how similar results are achieved in existing equipment. Advice from the suppliers applications engineers may also be available. This is not too demanding ... \$\endgroup\$ Commented Sep 11, 2016 at 22:35

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All you need to know :-)
From the late great Jim Williams- 132 pages ! AN47

http://cds.linear.com/docs/en/application-note/an47fa.pdf

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