Secondary voltage spike in flyback transformer

Question

schematic

^{simulate this circuit – Schematic created using CircuitLab}

I am using a TNY264 IC to make a custom flyback transformer. (U1 is the TNY264.)

The primary to secondary turns ratio is 10 with the primary inductance being 6mH.

I am using the standard design of flyback topology suggested by TNY264 datasheet without any bias winding.

The output is regulated at close to 13 volts using two 6.2V Zeners in series with an optocoupler providing feedback. (I used an LED and photodiode in the schematic to represent this as I couldn't find an optocoupler.)

The issue is as follows:

Large voltage spikes occur at the secondary when the switch is opened or when "flyback" occurs.

Blue -Drain voltage, yellow -output voltage The ringing caused by the leakage inductance is reflected onto the secondary.

I have clamped the drain with a RCD snubber, which peaks the drain voltage at 164V.

The nominal value of drain after the ringing stops is about 130 volts which is in agreement with the turns ratio. The circuit is working in DCM mode.

How can I stop the voltage spikes on the secondary? Should the primary snubber network be improved?

How good is your oscilloscope probing method? And, can you put some numbers on the spike you see (presumably the yellow trace where light blue is primary?). Also 200,000 farads is not an acceptable clamp capacitor value. — Andy aka
– Andy aka, Commented Dec 7, 2020 at 15:00
See this for correct probing to avoid false readings. You can check how good your present probing is by shorting the probe tip to your ground clip and see what the scope voltage looks like. I bet it looks pretty similar to your pictures above. Put some numbers on the spike voltage - do I have to repeat myself???? — Andy aka
– Andy aka, Commented Dec 7, 2020 at 15:11
I shorted the probe ground and tip as you suggested there is only an steady DC offset voltage of about 10mV. I think the probing is not the issue. — Farvez Farook
– Farvez Farook, Commented Dec 7, 2020 at 15:17
Add a bunch of 10uF ceramic caps in parallel to C2. Electrolytic caps have a slow response and inductive effects. — Damien
– Damien, Commented Dec 10, 2020 at 4:41
I saw this problem at my flyback design. I add a capacitor in parallel to Vin and solved. You had better try this method in my opinion. — Bunyamin
– Bunyamin, Commented Dec 11, 2020 at 17:39

Math Keeps Me Busy · Accepted Answer · 2025-07-23 17:39:56Z

When the primary switch in a flyback converter opens, there is a sudden surge of current through the flyback diode. This current surge is higher than the average output current. The output capacitor(s) absorb much of this current surge, and in the process the voltage across the output capacitor(s) rise. For ideal capacitors, the amount of voltage rise would be

$$\Delta V = Q/C$$

where \$Q\$ is the charge flowing into the capacitor. However, real capacitors, and their surrounding circuits, have resistance and inductance. When current suddenly starts flowing into C1, it also flows through parasitic inductance, either within the output capacitor itself, i.e. ESL, or within the attached wiring or traces. The sudden increase in current through that inductance is what causes the voltage spike on the secondary side when the primary switch turns off.

Adding an additional low ESL capacitor (perhaps a 0.1 uF ceramic) in parallel with C1 may attenuate your voltage spike. (Although in modeling, adding a small cap with no ESL or ESR only attenuated the spike a bit, but introduced ringing, so it wasn't a clear win.)

Here is a model which shows the "noise" created by a sudden current surge fed into a capacitor with parasitic inductance and resistance plus an additional parallel capacitor.

schematic

^{simulate this circuit – Schematic created using CircuitLab}

There output voltage bears some resemblance to the waveform seen by the OP.

Although the model has an extra capacitor, and the OP's schematic does not, it is possible that the flyback diode is playing the role of the extra capacitor.

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