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I’m seeking a full design review of my USB/UART interface project, which is based on the FT232RN chip. This project is intended as a didactic exercise, and while I’d appreciate feedback on all aspects of the design, I’d like to focus particularly on the following points.

Variable External Supply Voltage (VCCIO)

  • The chip’s VCCIO supply voltage is provided externally and may vary between 1.8V and 5V.
  • I’m not entirely sure if the datasheet’s examples, which typically assume VCCIO values of 5V or 3.3V, adequately address cases where VCCIO may be as low as 1.8V.
  • Given the lack of a specific reference design for variable VCCIO scenarios in the datasheet—even though the electrical characteristics include VCCIO = 1.8V

TX/RX LED Reference on VBUS

  • The datasheet example shows TX/RX LEDs being driven by a digital one-shot that switches the CBUS pins from a tri-state to a low state, with the LEDs referenced to VBUS (typically 5V). This allows me to size the resistor in series with the led without worrying about reference variation.
  • I question whether referencing the LEDs to VBUS is the best choice when VCCIO might be lower (e.g., 1.8V or 3.3V) from a functional standpoint.
  • I wonder if this design decision might introduce any drawbacks in terms of consistent LED functionality, and whether additional precautions, such as precise resistor sizing, are needed to ensure reliable operation.

Schematics

enter image description here

FT232RNL Datasheet

https://ftdichip.com/wp-content/uploads/2024/12/DS_FT232RN.pdf

I appreciate any insights, suggestions, or potential drawbacks you might identify regarding the overall design. Thank you in advance for your time and expertise!

UPDATE: I’ve revised the schematic based on the feedback. New version posted here.

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  • \$\begingroup\$ So, what does the data sheet say about supplies as low as 1.8 volts? Alternatively, why didn't you link the data sheet that you must have examined? \$\endgroup\$ Commented Mar 29 at 1:05
  • \$\begingroup\$ It say "Integrated level converter on UART and CBUS for interfacing to between +1.8V and +5V logic" and "True 5V/3.3V/2.8V/ 1.8V CMOS drive output and TTL input" in the feature page. And say "+1.8 V to +5.25 V supply to the UART Interface and CBUS group pins" in the description if VCCIO pin I edit the post to include link to datasheet \$\endgroup\$ Commented Mar 29 at 7:00
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    \$\begingroup\$ @mastupristi If you are puzzled about the downvote, it might be that in general design review questions are not very well suited for a Q&A site. While your question does have several identifable questions about if the circuit will work, review is not an answerable question, there's too many possible answers, requires extremely long answer, or opinion-based answers given how everyone interprets the question or the data sheet. (all these are in the "don't ask about" questions that require such answers in the EE.SE Tour what kind of questions should or should not be asked). \$\endgroup\$ Commented Mar 29 at 8:33
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    \$\begingroup\$ @mastupristi You updated the question with new design which now requires updating or changing the answers. Please don't move the goalposts. This isn't a discussion forum but a Q&A site. And why your new design has pull-up resistors on level translator push-pull outputs, it makes very little sense. \$\endgroup\$ Commented Mar 29 at 19:35
  • \$\begingroup\$ @Justme I'm sorry about that. For future reference, should I have created a new post? Do you think it is useful to do so now? The pullups are needed because it's written in the DS that if either supply is absent then the signals are in high impedance \$\endgroup\$ Commented Mar 29 at 21:59

2 Answers 2

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I think you can't do it like that. I recommend a separate level shifter that fully isolates the USB chip from your target. I don't mean galvanic isolation, just tolerating one side being unpowered while the other side is powered, and maybe allows level shifting to both directions (higher or lower). This would allow you to use standard 3.3V on levels on one side and 1.8V to 5V on other side.

The chip is wired as bus powered. It gets 4.5 to 5.5V VCC from USB VBUS, and the chip then uses internal regulator to generate a 3.3V supply from VCC to run the USB interface.

The datasheet says about on VCCIO that it should come from same source as VCC. Please note the wording, it is not required but it also gives no indication what happens if you don't do what you should be doing.

And you provide it externally, which is exactly what you should not be doing.

It could happen that you plug in USB and there is no VCCIO. It could happen you unplug USB and there is still 1.8V to 5V present on VDDIO.

Which brings us to the next issue, the absolute maximum ratings on the IO pins is VCC+0.5, so it basically means, if your USB host is unplugged or is turned off, VCC is 0V, and your "TTL" side has VCCIO and TX pin pushing 1.8V to 5V into the chip.

As for the other worries about the optimal usage of the LEDs, that is irrelevant at this point. They are just indicator LEDs. If you are worried about using VBUS with a 10% tolerance as LED supply and the 1.8V as VCCIO, then I suggest fixing the chip power issue first, and depending on how you solve it, you might also find it solved your LED issues.

You are right that in general LEDs powered with 5V and driven from lower voltage IO should be done carefully in order to not exceed the given ratings on IO pins like the maximum voltage they tolerate. However, as shown, the LEDs are powered with VCCIO, not 3V3 or VCC.

In real life, the questions you ask are better suited for chip manufacturer, not here, because only the manufacturer knows how their chips work internally. We can only quote the datasheets.

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Your design does not comply with the requirements, because the datasheet clearly states that VCCIO should be derived from VCC (datasheet page 7).

My advice is to use an additional buffer IC (e.g. NC7WZ17) for RX/TX and supply that with external (1.8V) voltage.

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