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  • I'm looking to connect two boards together some 30cm apart.
  • Signals will be some 50kHz PWMs and an I2C bus all at 3.3V.

I'm guessing with those requirements mostly anything will work out but I'm still trying my best to have the best signal integrity that I can.

Browsing on digikey for FFC I see options like the Molex 0150200281 but to my naive surprise they seem to be single layer.

I would have thought the cable being a PCB itself that they would be dual layers with a ground plane to maintain signal integrity along the cable.

Is it because I'm missing something and a ground plane would not help to maintain a better signal integrity?

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  • \$\begingroup\$ With how thin flat-flex is, you may find it difficult to get a very high line impedance. Probably better to treat it like CPW. \$\endgroup\$ Commented May 24 at 15:09
  • \$\begingroup\$ 50kHz isn't very high frequency. Are you sure that signal integrity will be an issue? For example, signal bandwidth can be limited explicitly by filtering at transmitter and receiver. \$\endgroup\$ Commented May 24 at 15:33
  • \$\begingroup\$ Back in the day we hooked our hard drives up with a 40 pin ribbon cable and thought nothing of it! \$\endgroup\$ Commented May 26 at 1:16

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A ground plane on an FFC does two things that provides shielding and a path for return currents.

The shielding helps because it creates capacitance directly adjacent to the trace so electric fields have less of a chance to radiate and want to return to the source which means you're more likely to have a better chance of passing FCC.

With high speed signals you must have a ground plane directly underneath the trace or adjacent to the trace to carry return currents and minimize inductance otherwise then inductance is too great and it affects the rise time of the signal.

Some molex cables have the option of EMI shielding instead of a ground plane. What we ended up doing is doing a custom FPC with a ground plane and we had much better results on FCC tests. (You can make your own FPC that fits into molex if you follow the dimensions of their cable)

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For your PWM signals, the 50kHz PWM frequency matters less than rise time.

The bandwidth of your square/rectangle signals is directly related to the rise time. The faster the rise time, the wider the bandwidth. Many modern MCUs have output rise times in the nanoseconds, which means bandwidth up to hundreds of MHz. A great opportunity to turn any cable into a wideband transmitting antenna!

While digital signal bandwidth comes from rise time, frequency also matters. Each edge acts as a pulse of RF that can be radiated by the cable, but frequency determines how often that happens, so a higher frequency digital signal will want to radiate more energy simply because it has more edges.

In other words, if you add a simple resistor in series at the source, like 33-75R, it will slow the edges a little bit, reduce bandwidth, and add some impedance matching. This will avoid many headaches, even if the impedance matching isn't perfect... and you won't need to worry about a ground plane in your cable.

Since the goal is to limit signal rise time, and current pulses charging and discharging the transmission line capacitance, the resistor should be on the driver side, close to the source of the signal.

Signal layout for your FFC is the same as for ribbon cable, from highest to lowest signal integrity:

  • One GND between each signal ; order the signals to keep some distance between potential crosstalk victims and aggressors

  • 2 signals, GND, 2 signals, GND... this ensures each signal has at least one GND next to it

  • Add decoupling caps between supply and ground at both ends of the cable, to link VCC and GND at high frequency. Now, VCC wires in the cable can play the same reference role as GND with regards to signal integrity. This is useful if you need several VCC wires in parallel for the supply current you need, or if you have several supply voltages, they can act as "free" reference wires (still costs the capacitors though).

  • Then you can cluster your signals, have one side of the cable with crosstalk aggressors, highspeed but insensitive signals, and several reference wires in the bunch, then on the other side of the cable more quiet signals that won't need as many reference wires.

  • For lower cost (and lower integrity), keep deleting reference wires until a problem occurs.

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  • \$\begingroup\$ Such series resistors would only be required for PWM lines as the CPU quickly pull them high and not for the I2C as they are pulled high through resistors? \$\endgroup\$ Commented May 24 at 16:03
  • \$\begingroup\$ Does it make a difference if the series resistors are on the transmitter or receiver side? \$\endgroup\$ Commented May 24 at 16:12
  • \$\begingroup\$ Resistors on the driver side, since the goal is to limit the rise time in the cable. Besides impedance matching, resistors limit the current spike that occurs at level transition when charging/discharging cable capacitance. Less current spikes results in less problems. Indeed resistors not required for I2C. \$\endgroup\$ Commented May 24 at 16:28
  • \$\begingroup\$ @Francois I2C still has a sharp pull-down (though, how sharp, isn't always covered by the datasheet). Series resistance would compromise on pull-down strength, but ferrite beads can be used profitably here. \$\endgroup\$ Commented May 25 at 8:21
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FFC is thin, that nearby ground plane will drastically lower the characteristic impedance of the traces, that may give you reflections and other woes but in the kilohertz and low megahertz ranges should not be a big problem for digital signals.

Just doing a single layer, but putting grounds between signal lines is probably a better approach.

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  • \$\begingroup\$ I'm not convinced that a lower characteristic impedance would increase reflections. If the other end is a high-impedance input, there will be almost full reflection there in any case. But the source end has some driving impedance, often around 10-100 ohms for CMOS outputs, and that will be a closer series-termination match to a low rather than large impedance. \$\endgroup\$ Commented May 25 at 7:39

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