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.title mine .include "measure_models.cir" Vin vcc 0 PULSE(0 5 0 0 0 0.05us 0.1us 1000000) R0 vcc bar 100k D1 bar top BAT54 C1 top 0 100nF .tran 10ns 200ms .control run plot V(top) .endc

In the simulation, VCC is pulsed with a square wave in the first half, but kept at 0V in the second half (the point of the latter being to demonstrate that discharging also happens).

schematic

simulate this circuit – Schematic created using CircuitLab

Say I have a Pierce oscillator with variable resistors (pots) for Rf, Rd. I am interested mainly in the frequency 8MHz.

I'd like to tune the pots to find combinations that oscillate with certain Vpp, and then pick a more "central" one.

My thinking is to include a diode from the oscillator output to a capacitor to ground, with a current limiting resistor before the diode. The capacitor will be of C0G type, or other type of suitably low leakage. The intent is for the capacitor to charge through the diode disproportionately more than it discharges (when we view the capacitor as initially uncharged).

This is intended to allow at least comparisons between parameter sets to be made, even if the exact Vpp of oscillation cannot be determined.

However I am not sure whether attaching the diode and capacitor, albeit after a series resistor, and subsequently also attaching a digital multi-meter across the capacitor, won't somehow interfere with the oscillating circuit.

Anyone knows about this?

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  • \$\begingroup\$ Nothing you say in your post appears to be related to the subject of "tuning crystal oscillator circuits". Additionally, the proposal to use pots to alter some undefined resistors in a pierce oscillator does not hold water. \$\endgroup\$ Commented Nov 4 at 11:26
  • \$\begingroup\$ @Andyaka Could you elaborate on why tuning the feedback and series resistors of a Pierce oscillator cannot be achieved using pots? As I was planning to do precisely that, it would help me greatly to understand why it can't be done. \$\endgroup\$ Commented Nov 4 at 11:30
  • \$\begingroup\$ Crystal Oscillators (typically Pierce) from my own basic website \$\endgroup\$ Commented Nov 4 at 11:32
  • \$\begingroup\$ @Andyaka Well, your website is undoubtedly a very interesting resource - but I'm still faced with the problem that I do not know the characteristics of the CMOS inverter I'm using. Your website appears strongly focused on simulation. Is there any reason it wouldn't work to attempt to find suitable resistor values from experiment, by having pots in the signal path that can be adjusted? \$\endgroup\$ Commented Nov 4 at 11:43
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    \$\begingroup\$ @Hammdist when someone refers to tuning an oscillator, almost every EE (if asked what that means) would tick the box labelled "tuning the frequency". \$\endgroup\$ Commented Nov 4 at 12:42

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You have simulated the circuit with ideal square wave voltage output.

A Pierce oscillator doesn't have infinitely strong output, and not even a square wave.

If you would draw the oscillator circuit and try to work on output it has, you could simulate the circuit you are thinking. You never revealed how you would implement the oscillator, or how you would connect it to your RC peak detector.

It will also not store the amplitude of the oscillation, but simply the maximum voltage of the sine wave, so there is no consideration what is the DC offset of the sine wave to know the amplitude.

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  • \$\begingroup\$ Unfortunately I'm lacking a proper SPICE model for the CMOS inverter I plan to use. Getting into making models for CMOS transistors is beyond by expertise in SPICE. Thus it is not practical to attempt to simulate the crystal oscillator itself for my purposes. Is it possible to mistune a Pierce oscillator into having a bad DC offset? \$\endgroup\$ Commented Nov 4 at 10:52
  • \$\begingroup\$ Hammdist - The DC offset sets itself via the direct feedback resistor exactly where it needs to be to start oscillation...in the "linear" region near half-Vdd. Messing with this self-bias point invites non-oscillation. \$\endgroup\$ Commented Nov 4 at 12:44
  • \$\begingroup\$ @Hammdist If you intend to use an unbuffered CMOS inverter as the active amplifier, the DC bias is not going to be exactly VDD/2 due to manufacturing tolerances, plus, your circuit will be loading the output until charged. Also the waveform might not be an ideal sine wave either. \$\endgroup\$ Commented Nov 4 at 12:53
  • \$\begingroup\$ Hammdist - I have a model of HCMOS unbuffered NMOS/PMOS inverter (74HCU04). If you're interested, I could include it in an answer for you to simulate in SPICE. Just be aware that the 74HCU04 is a stronger, beefier inverter than those embedded in a MCU. Personally, I've gained some insight into oscillator operation using this model. \$\endgroup\$ Commented Nov 4 at 13:56
  • \$\begingroup\$ @glen_geek MCUs these days may not have simple inverters - they have all kinds of features, such as being able to enable/disable the amplifier circuit, change amplifier strength to be compatible with different frequencies and types of resonators, startup boosting circuit and automatic gain control, to name a few. So something to be aware of if comparing HCU04 and MCUs. \$\endgroup\$ Commented Nov 4 at 14:07
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Looking at peak-to-peak amplitude of the Pierce oscillator output likely doesn't reveal how robustly the oscillator is oscillating. Amplitude tends to build up to the DC supply limit, or else oscillation doesn't happen at all.

A LTspice run using a model of 74HCU04 (the unbuffered inverter) and an 8 MHz crystal having 50 ohm series resistance was simulated. The series resistor (R2) was varied from 500 ohms to 10k ohms in steps...
schematic pierce oscillator


You can see that after a few milliseconds, peak amplitude @ 8 MHz has grown near 3.6V p-p. These waveforms are all squarish shaped. However, with R2=10k, the oscillator starts up slowly, but will eventually reach a high amplitude. I doubt a real oscillator with R2=10k would start up at all because some missing bits have been omitted from the simulation.
pierce start up timing with various R2 One can see that start-up time is changing with R2. Microcontrollers are often very careful about the condition of their master oscillator before the transfer of control is allowed...a monitor circuit approves of its output and sets a status flag when it is "stable".
During the crystal oscillator start-up, the microcontroller runs from an internal RC oscillator whose own start-up is nearly instantaneous.
It may be possible for this type microcontroller to measure the time required for its status flag to indicate "stable". I haven't tried this.

Another aspect of oscillator robustness is its power requirements from its DC supply. During startup, this Pierce pulls 6.14 mA (for any R2). Once oscillation begins, DC average current actually reduces, especially for the robust case when R2 is small.current draw from supply versus time.


If this oscillator didn't start, current draw would remain at 6.14 mA forever and not reduce. A microcontroller's oscillator is not as beefy as this 74HCU04 simulation, so its quiescent current draw would be much smaller, and a very small fraction of total VDD current. It would likely be pointless to monitor VDD current of a microcontroller.

Oscillating frequency for the last two steps (R2=5k, R2=10k) differed from the first three cases (R2=500, R2=1k, R2=2k) by 2.89 kHz. This may be because full amplitude hadn't yet been reached. Had I let build-up continue for many more milliseconds, frequency's may all converge, or nearly so.
This simulation uses a crystal model having only one series resonance and one parallel resonance. Crystals often have spurious resonances above parallel resonance that sometimes take over - especially if loop gain is higher than necessary...when R2 is too small.

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