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I am using a Microchip SAMA5D27 Wireless System-On-Module 1 (ATSAMA5D27-WLSOM1) MPU SOM Module with a Micron MT29F4G08ABADAWP-IT:D NAND Flash device for storing the boot image. I will also use a 4-bit SD card interface with the MPU for data logging.

I’m reviewing the MPU datasheet (link above) and have some confusion regarding the pin mapping for the SD card and NAND flash interfaces.

On page 34 (Figure 4-20), the interface between the SOM and the SD card shows that the SOM’s PA[0:5] pins are used for the SD card connection.

However, on page 38 (Figure 4-27), the interface between the NAND flash and the MPU also shows the same PA[0:5] pins being used.

I also checked section 4.6.3 (page 37), which mentions that NAND should be connected using the NAND controller pins.

This has left me confused — should the NAND flash and SD card really share the same PA[0:5] pins? Which pins should actually be used for the NAND and which for the SD card?

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No, the NAND and SD should not share pins.

It simply means you can connect either the SD card or the NAND to these pins and you can't have both.

If there are no pins to have NAND and SD simultaneously on different pins, it's the wrong MCU selection for the task.

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  • \$\begingroup\$ thanks! Ok, but why is it mandatory to have the SD/NAND on the same pins for this MPU (why cannot I try to bit bang with other pins available) ? Is it mandatory for the interfaces to have the PA0-7 or PA0-3 pins for data? I believe both have different protocols even if they both are parallel interfaces, right? If that's not possible, can both interfaces exist and I can just bit bang one of the interfaces with the same MPU? \$\endgroup\$ Commented Oct 25 at 17:01
  • \$\begingroup\$ @Potionless Why designers put the two interfaces to same pins is their decision and we cannot read their minds why it ended up being so. If you can bit bang one of the interfaces or use SD card via SPI is your decision, but it might heavily limit what you intended to do with the chip. \$\endgroup\$ Commented Oct 25 at 19:36
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    \$\begingroup\$ @Potionless It's likely that both interfaces take advantage of some of the same hardware that's only present on those pins, and too expensive to include more than one copy of for other pins. \$\endgroup\$ Commented Oct 25 at 19:44
  • \$\begingroup\$ If you want to bit-bang, then you never need to worry about special GPIO pin assignments for particular functions. But usually you don't want to bit-bang if you can avoid it. \$\endgroup\$ Commented Oct 26 at 2:31
  • \$\begingroup\$ Finally, without bit banging, I can't use NAND on any other pins apart from the PA0 pins right?! \$\endgroup\$ Commented Oct 26 at 14:56

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