The Design and Implementation of a Pulse Compression Filter on an FPGA.
fpga matlab fir hilbert-transform matched-filter pulse-compression-filter alpha-max-plus-beta-min complex-fir non-resoting-sqare-root
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Aug 7, 2021 - Verilog
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alpha-max-plus-beta-min
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Compute the hypotenuse using the alpha max plus beta min algorithm.
nodejs javascript fast node trigonometry math geometry euclid stdlib triangle mathematics node-js euclidean trig pythagoras hypotenuse pythagorean-theorem hypot fastmath alpha-max-plus-beta-min
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Sep 6, 2025 - JavaScript
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