[X86][GlobalISel] Support globals in pic mode #170038
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Introduce G_TARGET_GLOBAL_VALUE. It is similar to TargetGlobalAddress in SDAG. Essentially it is required to make legalization possible when a load from stub is required to obtain a poitner to the global value. It makes possible to use GlobalISel as a solo selector with simple programs on X86. Also added a missing check on X86SelectAddress failure.
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| @llvm/pr-subscribers-llvm-globalisel @llvm/pr-subscribers-llvm-support Author: Evgenii Kudriashov (e-kud) ChangesIntroduce G_TARGET_GLOBAL_VALUE. It is similar to TargetGlobalAddress in DAG. Essentially it is required to make legalization possible when a load from stub is required to obtain a pointer to a global value. It makes possible to use GlobalISel as a solo selector with simple programs on X86. Also added a missing check on X86SelectAddress failure. Full diff: https://github.com/llvm/llvm-project/pull/170038.diff 14 Files Affected:
diff --git a/llvm/docs/GlobalISel/GenericOpcode.rst b/llvm/docs/GlobalISel/GenericOpcode.rst index 329d9d13ebddd..9c0654897703d 100644 --- a/llvm/docs/GlobalISel/GenericOpcode.rst +++ b/llvm/docs/GlobalISel/GenericOpcode.rst @@ -60,6 +60,16 @@ The address of a global value. %0(p0) = G_GLOBAL_VALUE @var_local +G_TARGET_GLOBAL_VALUE +^^^^^^^^^^^^^^^^^^^^^ + +Like G_GLOBAL_VALUE, but GlobalISel does no folding or anything else with this +node, and this is valid in the target-specific selection. + +.. code-block:: none + + %0(p0) = G_TARGET_GLOBAL_VALUE @var_global + G_PTRAUTH_GLOBAL_VALUE ^^^^^^^^^^^^^^^^^^^^^^ diff --git a/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h b/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h index 5f3f1d386569c..59a1ee4bf8210 100644 --- a/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h +++ b/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h @@ -496,6 +496,20 @@ class LLVM_ABI MachineIRBuilder { /// \return a MachineInstrBuilder for the newly created instruction. MachineInstrBuilder buildGlobalValue(const DstOp &Res, const GlobalValue *GV); + /// Build and insert \p Res = G_TARGET_GLOBAL_VALUE \p GV + /// + /// G_TARGET_GLOBAL_VALUE materializes the address of the specified global + /// into \p Res. It is a version of G_GLOBAL_VALUE for target specific + /// legalization of global addresses. + /// + /// \pre setBasicBlock or setMI must have been called. + /// \pre \p Res must be a generic virtual register with pointer type + /// in the same address space as \p GV. + /// + /// \return a MachineInstrBuilder for the newly created instruction. + MachineInstrBuilder buildTargetGlobalValue(const DstOp &Res, + const GlobalValue *GV); + /// Build and insert \p Res = G_CONSTANT_POOL \p Idx /// /// G_CONSTANT_POOL materializes the address of an object in the constant diff --git a/llvm/include/llvm/Support/TargetOpcodes.def b/llvm/include/llvm/Support/TargetOpcodes.def index 341fc5e50b33c..c7afd1bdd1024 100644 --- a/llvm/include/llvm/Support/TargetOpcodes.def +++ b/llvm/include/llvm/Support/TargetOpcodes.def @@ -322,6 +322,11 @@ HANDLE_TARGET_OPCODE(G_FRAME_INDEX) /// Generic reference to global value. HANDLE_TARGET_OPCODE(G_GLOBAL_VALUE) +/// Generic target specific reference to a global value (typically for +/// distinguishing already legalized and not yet legalized refrence to a global +/// value). +HANDLE_TARGET_OPCODE(G_TARGET_GLOBAL_VALUE) + /// Generic ptrauth-signed reference to global value. HANDLE_TARGET_OPCODE(G_PTRAUTH_GLOBAL_VALUE) diff --git a/llvm/include/llvm/Target/GenericOpcodes.td b/llvm/include/llvm/Target/GenericOpcodes.td index 1b65b8b73527d..08df4e48ec6e8 100644 --- a/llvm/include/llvm/Target/GenericOpcodes.td +++ b/llvm/include/llvm/Target/GenericOpcodes.td @@ -131,6 +131,12 @@ def G_GLOBAL_VALUE : GenericInstruction { let hasSideEffects = false; } +def G_TARGET_GLOBAL_VALUE : GenericInstruction { + let OutOperandList = (outs ptype0:$dst); + let InOperandList = (ins unknown:$src); + let hasSideEffects = false; +} + def G_PTRAUTH_GLOBAL_VALUE : GenericInstruction { let OutOperandList = (outs type0:$dst); let InOperandList = (ins unknown:$addr, i32imm:$key, type1:$addrdisc, i64imm:$disc); diff --git a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp index 3906b311addf0..08bda5fbce223 100644 --- a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp +++ b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp @@ -170,6 +170,20 @@ MachineInstrBuilder MachineIRBuilder::buildGlobalValue(const DstOp &Res, return MIB; } +MachineInstrBuilder +MachineIRBuilder::buildTargetGlobalValue(const DstOp &Res, + const GlobalValue *GV) { + assert(Res.getLLTTy(*getMRI()).isPointer() && "invalid operand type"); + assert(Res.getLLTTy(*getMRI()).getAddressSpace() == + GV->getType()->getAddressSpace() && + "address space mismatch"); + + auto MIB = buildInstr(TargetOpcode::G_TARGET_GLOBAL_VALUE); + Res.addDefToMIB(*getMRI(), MIB); + MIB.addGlobalAddress(GV); + return MIB; +} + MachineInstrBuilder MachineIRBuilder::buildConstantPool(const DstOp &Res, unsigned Idx) { assert(Res.getLLTTy(*getMRI()).isPointer() && "invalid operand type"); diff --git a/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp b/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp index f499e6f9d0799..675284cc58f52 100644 --- a/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp +++ b/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp @@ -627,7 +627,8 @@ static bool X86SelectAddress(MachineInstr &I, const X86TargetMachine &TM, } break; } - case TargetOpcode::G_GLOBAL_VALUE: { + case TargetOpcode::G_GLOBAL_VALUE: + case TargetOpcode::G_TARGET_GLOBAL_VALUE: { auto GV = I.getOperand(1).getGlobal(); if (GV->isThreadLocal()) { return false; // TODO: we don't support TLS yet. @@ -638,15 +639,12 @@ static bool X86SelectAddress(MachineInstr &I, const X86TargetMachine &TM, AM.GV = GV; AM.GVOpFlags = STI.classifyGlobalReference(GV); - // TODO: The ABI requires an extra load. not supported yet. - if (isGlobalStubReference(AM.GVOpFlags)) - return false; - // TODO: This reference is relative to the pic base. not supported yet. if (isGlobalRelativeToPICBase(AM.GVOpFlags)) return false; - if (STI.isPICStyleRIPRel()) { + if (STI.isPICStyleRIPRel() || AM.GVOpFlags == X86II::MO_GOTPCREL || + AM.GVOpFlags == X86II::MO_GOTPCREL_NORELAX) { // Use rip-relative addressing. assert(AM.Base.Reg == 0 && AM.IndexReg == 0 && "RIP-relative addresses can't have additional register operands"); @@ -1972,7 +1970,8 @@ X86InstructionSelector::selectAddr(MachineOperand &Root) const { MachineRegisterInfo &MRI = MI->getMF()->getRegInfo(); MachineInstr *Ptr = MRI.getVRegDef(Root.getReg()); X86AddressMode AM; - X86SelectAddress(*Ptr, TM, MRI, STI, AM); + if (!X86SelectAddress(*Ptr, TM, MRI, STI, AM)) + return std::nullopt; if (AM.IndexReg) return std::nullopt; diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp index e792b1bce3c5c..dea0c70ec7b41 100644 --- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp +++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp @@ -330,7 +330,10 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI, .widenScalarToNextPow2(1, /*Min*/ 32) .clampScalar(1, s32, sMaxScalar); - getActionDefinitionsBuilder({G_FRAME_INDEX, G_GLOBAL_VALUE}).legalFor({p0}); + getActionDefinitionsBuilder({G_FRAME_INDEX, G_TARGET_GLOBAL_VALUE}) + .legalFor({p0}); + + getActionDefinitionsBuilder(G_GLOBAL_VALUE).customFor({p0}); // load/store: add more corner cases for (unsigned Op : {G_LOAD, G_STORE}) { @@ -623,6 +626,8 @@ bool X86LegalizerInfo::legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI, return legalizeGETROUNDING(MI, MRI, Helper); case TargetOpcode::G_SET_ROUNDING: return legalizeSETROUNDING(MI, MRI, Helper); + case TargetOpcode::G_GLOBAL_VALUE: + return legalizeGLOBAL_VALUE(MI, MRI, Helper); } llvm_unreachable("expected switch to return"); } @@ -993,6 +998,28 @@ bool X86LegalizerInfo::legalizeSETROUNDING(MachineInstr &MI, return true; } +bool X86LegalizerInfo::legalizeGLOBAL_VALUE(MachineInstr &MI, + MachineRegisterInfo &MRI, + LegalizerHelper &Helper) const { + auto GV = MI.getOperand(1).getGlobal(); + Register Dst = MI.getOperand(0).getReg(); + LLT DstTy = MRI.getType(Dst); + auto GVOpFlags = Subtarget.classifyGlobalReference(GV); + + if (isGlobalStubReference(GVOpFlags)) { + MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; + MachineFunction &MF = MIRBuilder.getMF(); + + auto StubAddr = MIRBuilder.buildTargetGlobalValue(DstTy, GV); + auto MMO = MF.getMachineMemOperand(MachinePointerInfo::getGOT(MF), + MachineMemOperand::MOLoad, DstTy, + Align(DstTy.getSizeInBytes())); + MIRBuilder.buildLoad(Dst, StubAddr, *MMO); + MI.eraseFromParent(); + } + return true; +} + bool X86LegalizerInfo::legalizeIntrinsic(LegalizerHelper &Helper, MachineInstr &MI) const { return true; diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.h b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.h index 09c727c8e8685..58be7bb7d02b8 100644 --- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.h +++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.h @@ -60,6 +60,9 @@ class X86LegalizerInfo : public LegalizerInfo { bool legalizeSETROUNDING(MachineInstr &MI, MachineRegisterInfo &MRI, LegalizerHelper &Helper) const; + + bool legalizeGLOBAL_VALUE(MachineInstr &MI, MachineRegisterInfo &MRI, + LegalizerHelper &Helper) const; }; } // namespace llvm #endif diff --git a/llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_print.txt b/llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_print.txt index 74ef1e608d4ba..6d8d0f3ce89ce 100644 --- a/llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_print.txt +++ b/llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_print.txt @@ -533,6 +533,7 @@ Key: G_STRICT_FREM: [ 0.00 0.00 ] Key: G_STRICT_FSQRT: [ 0.00 0.00 ] Key: G_STRICT_FSUB: [ 0.00 0.00 ] Key: G_SUB: [ 0.00 0.00 ] +Key: G_TARGET_GLOBAL_VALUE: [ 0.00 0.00 ] Key: G_TRAP: [ 0.00 0.00 ] Key: G_TRUNC: [ 0.00 0.00 ] Key: G_TRUNC_SSAT_S: [ 0.00 0.00 ] diff --git a/llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_wo=0.5_print.txt b/llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_wo=0.5_print.txt index 1ba4f13e69c92..69b7c4926bc79 100644 --- a/llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_wo=0.5_print.txt +++ b/llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_wo=0.5_print.txt @@ -533,6 +533,7 @@ Key: G_STRICT_FREM: [ 0.00 0.00 ] Key: G_STRICT_FSQRT: [ 0.00 0.00 ] Key: G_STRICT_FSUB: [ 0.00 0.00 ] Key: G_SUB: [ 0.00 0.00 ] +Key: G_TARGET_GLOBAL_VALUE: [ 0.00 0.00 ] Key: G_TRAP: [ 0.00 0.00 ] Key: G_TRUNC: [ 0.00 0.00 ] Key: G_TRUNC_SSAT_S: [ 0.00 0.00 ] diff --git a/llvm/test/CodeGen/X86/GlobalISel/GV.ll b/llvm/test/CodeGen/X86/GlobalISel/GV.ll index c161a32fd6b95..aa64126edc4af 100644 --- a/llvm/test/CodeGen/X86/GlobalISel/GV.ll +++ b/llvm/test/CodeGen/X86/GlobalISel/GV.ll @@ -1,13 +1,13 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64 ; RUN: llc -mtriple=x86_64-apple-darwin -global-isel -verify-machineinstrs -relocation-model=pic < %s -o - | FileCheck %s --check-prefix=X64_DARWIN_PIC -; RUN: llc -mtriple=i386-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X32 -; RUN: llc -mtriple=x86_64-linux-gnux32 -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X32ABI +; RUN: llc -mtriple=i386-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X86 +; RUN: llc -mtriple=x86_64-linux-gnux32 -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X32 @g_int = dso_local global i32 0, align 4 +@g_int_stub = global i32 0, align 4 -; Function Attrs: noinline nounwind optnone uwtable -define dso_local ptr @test_global_ptrv() #3 { +define dso_local ptr @test_global_ptrv() { ; X64-LABEL: test_global_ptrv: ; X64: # %bb.0: # %entry ; X64-NEXT: leaq g_int, %rax @@ -18,22 +18,21 @@ define dso_local ptr @test_global_ptrv() #3 { ; X64_DARWIN_PIC-NEXT: leaq _g_int(%rip), %rax ; X64_DARWIN_PIC-NEXT: retq ; +; X86-LABEL: test_global_ptrv: +; X86: # %bb.0: # %entry +; X86-NEXT: leal g_int, %eax +; X86-NEXT: retl +; ; X32-LABEL: test_global_ptrv: ; X32: # %bb.0: # %entry ; X32-NEXT: leal g_int, %eax -; X32-NEXT: retl -; -; X32ABI-LABEL: test_global_ptrv: -; X32ABI: # %bb.0: # %entry -; X32ABI-NEXT: leal g_int, %eax -; X32ABI-NEXT: movl %eax, %eax -; X32ABI-NEXT: retq +; X32-NEXT: movl %eax, %eax +; X32-NEXT: retq entry: ret ptr @g_int } -; Function Attrs: noinline nounwind optnone uwtable -define dso_local i32 @test_global_valv() #3 { +define dso_local i32 @test_global_valv() { ; X64-LABEL: test_global_valv: ; X64: # %bb.0: # %entry ; X64-NEXT: movl g_int, %eax @@ -44,17 +43,65 @@ define dso_local i32 @test_global_valv() #3 { ; X64_DARWIN_PIC-NEXT: movl _g_int(%rip), %eax ; X64_DARWIN_PIC-NEXT: retq ; +; X86-LABEL: test_global_valv: +; X86: # %bb.0: # %entry +; X86-NEXT: movl g_int, %eax +; X86-NEXT: retl +; ; X32-LABEL: test_global_valv: ; X32: # %bb.0: # %entry ; X32-NEXT: movl g_int, %eax -; X32-NEXT: retl -; -; X32ABI-LABEL: test_global_valv: -; X32ABI: # %bb.0: # %entry -; X32ABI-NEXT: movl g_int, %eax -; X32ABI-NEXT: retq +; X32-NEXT: retq entry: %0 = load i32, ptr @g_int, align 4 ret i32 %0 } +define dso_local ptr @test_global_stub_ptrv() { +; X64-LABEL: test_global_stub_ptrv: +; X64: # %bb.0: +; X64-NEXT: movq g_int_stub@GOTPCREL(%rip), %rax +; X64-NEXT: retq +; +; X64_DARWIN_PIC-LABEL: test_global_stub_ptrv: +; X64_DARWIN_PIC: ## %bb.0: +; X64_DARWIN_PIC-NEXT: leaq _g_int_stub(%rip), %rax +; X64_DARWIN_PIC-NEXT: retq +; +; X86-LABEL: test_global_stub_ptrv: +; X86: # %bb.0: +; X86-NEXT: leal g_int_stub, %eax +; X86-NEXT: retl +; +; X32-LABEL: test_global_stub_ptrv: +; X32: # %bb.0: +; X32-NEXT: movl g_int_stub@GOTPCREL(%rip), %eax +; X32-NEXT: retq + ret ptr @g_int_stub +} + +define dso_local i32 @test_global_stub_valv() { +; X64-LABEL: test_global_stub_valv: +; X64: # %bb.0: +; X64-NEXT: movq g_int_stub@GOTPCREL(%rip), %rax +; X64-NEXT: movl (%rax), %eax +; X64-NEXT: retq +; +; X64_DARWIN_PIC-LABEL: test_global_stub_valv: +; X64_DARWIN_PIC: ## %bb.0: +; X64_DARWIN_PIC-NEXT: movl _g_int_stub(%rip), %eax +; X64_DARWIN_PIC-NEXT: retq +; +; X86-LABEL: test_global_stub_valv: +; X86: # %bb.0: +; X86-NEXT: movl g_int_stub, %eax +; X86-NEXT: retl +; +; X32-LABEL: test_global_stub_valv: +; X32: # %bb.0: +; X32-NEXT: movl g_int_stub@GOTPCREL(%rip), %eax +; X32-NEXT: movl (%eax), %eax +; X32-NEXT: retq + %val = load i32, ptr @g_int_stub, align 4 + ret i32 %val +} diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-GV.mir b/llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-GV.mir index e7c5d9b367941..e964a47547c0c 100644 --- a/llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-GV.mir +++ b/llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-GV.mir @@ -15,10 +15,12 @@ alignment: 16 legalized: false regBankSelected: false # CHECK: registers: -# CHECK-NEXT: - { id: 0, class: _, preferred-register: '', flags: [ ] } +# CHECK-NEXT: - { id: 0, class: _, preferred-register: '', flags: [ ] } +# CHECK-NEXT: - { id: 1, class: _, preferred-register: '', flags: [ ] } registers: - { id: 0, class: _, preferred-register: '' } -# CHECK: %0:_(p0) = G_GLOBAL_VALUE @g_int +# CHECK: %1:_(p0) = G_TARGET_GLOBAL_VALUE @g_int +# CHECK-NEXT: %0:_(p0) = G_LOAD %1(p0) :: (load (p0) from got) # CHECK-NEXT: $rax = COPY %0(p0) # CHECK-NEXT: RET 0, implicit $rax body: | diff --git a/llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-cxx.td b/llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-cxx.td index a8488ca3b8e6a..28017700a0448 100644 --- a/llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-cxx.td +++ b/llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-cxx.td @@ -96,7 +96,7 @@ def MyCombiner: GICombiner<"GenMyCombiner", [ // CHECK: const uint8_t *GenMyCombiner::getMatchTable() const { // CHECK-NEXT: constexpr static uint8_t MatchTable0[] = { -// CHECK-NEXT: /* 0 */ GIM_SwitchOpcode, /*MI*/0, /*[*/GIMT_Encode2(104), GIMT_Encode2(216), /*)*//*default:*//*Label 5*/ GIMT_Encode4(524), +// CHECK-NEXT: /* 0 */ GIM_SwitchOpcode, /*MI*/0, /*[*/GIMT_Encode2(105), GIMT_Encode2(217), /*)*//*default:*//*Label 5*/ GIMT_Encode4(524), // CHECK-NEXT: /* 10 */ /*TargetOpcode::G_STORE*//*Label 0*/ GIMT_Encode4(458), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), // CHECK-NEXT: /* 182 */ /*TargetOpcode::G_SEXT*//*Label 1*/ GIMT_Encode4(476), GIMT_Encode4(0), // CHECK-NEXT: /* 190 */ /*TargetOpcode::G_ZEXT*//*Label 2*/ GIMT_Encode4(488), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), diff --git a/llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td b/llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td index 64ca63da3b6f0..9809a43fcdddd 100644 --- a/llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td +++ b/llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td @@ -535,7 +535,7 @@ def : Pat<(frag GPR32:$src1, complex:$src2, complex:$src3), // R00O-NEXT: GIM_Reject, // R00O: // Label [[DEFAULT_NUM]]: @[[DEFAULT]] // R00O-NEXT: GIM_Reject, -// R00O-NEXT: }; // Size: 1918 bytes +// R00O-NEXT: }; // Size: 1922 bytes def INSNBOB : I<(outs GPR32:$dst), (ins GPR32:$src1, GPR32:$src2, GPR32:$src3, GPR32:$src4), [(set GPR32:$dst, |
arsenm reviewed Nov 30, 2025
| G_TARGET_GLOBAL_VALUE | ||
| ^^^^^^^^^^^^^^^^^^^^^ | ||
| | ||
| Like G_GLOBAL_VALUE, but GlobalISel does no folding or anything else with this |
Contributor
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I don't think this should be an instruction, or it makes any sense to be one. I assume this is analog with SelectionDAG's TargetGlobalAddress. The point of the distinction is materialized in register or not, so the gisel equivalent would be a use directly in the instruction operand list without a materialized register
🐧 Linux x64 Test Results
Failed Tests(click on a test name to see its output) LLVMLLVM.CodeGen/AArch64/GlobalISel/legalizer-info-validation.mirLLVM.CodeGen/RISCV/GlobalISel/legalizer-info-validation.mirIf these failures are unrelated to your changes (for example tests are broken or flaky at HEAD), please open an issue at https://github.com/llvm/llvm-project/issues and add the |
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Introduce G_TARGET_GLOBAL_VALUE. It is similar to TargetGlobalAddress in DAG. Essentially it is required to make legalization possible when a load from stub is required to obtain a pointer to a global value.
It makes possible to use GlobalISel as a solo selector with simple programs on X86.
Also added a missing check on X86SelectAddress failure.