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Pull requests: llvm/llvm-project

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Pull requests list

Replace llvm.memcpy et al's i1 isVolatile with i8 VolFlags backend:AArch64 backend:AMDGPU backend:ARM backend:loongarch backend:MSP430 backend:RISC-V backend:Sparc backend:WebAssembly backend:X86 clang:codegen

IR generation bugs: mangling, exceptions, etc.

clang

Clang issues not falling into any other category

debuginfo flang:driver flang:fir-hlfir flang:openmp flang

Flang issues not falling into any other category

llvm:analysis

Includes value tracking, cost tables and constant folding

llvm:globalisel llvm:ir llvm:SelectionDAG

SelectionDAGISel as well

llvm:support llvm:transforms mlir:llvm mlir:spirv mlir PGO

Profile Guided Optimizations

#65748 opened Sep 8, 2023 by urnathan

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[IR] Add intrinsics to represent complex multiply and divide operations backend:AArch64 backend:AMDGPU backend:ARM backend:loongarch backend:X86 llvm:ir llvm:SelectionDAG

SelectionDAGISel as well

#68742 opened Oct 10, 2023 by jcranmer-intel

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[Clang][LoongArch] Support basic fp16, fp128 backend:loongarch clang:frontend

Language frontend issues, e.g. anything involving "Sema"

clang

Clang issues not falling into any other category

#68851 opened Oct 12, 2023 by Xinmudotmoe

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[LoongArch] MC relaxation for out-of-range conditional branch backend:loongarch lld:ELF lld llvm:mc

Machine (object) code

#72095 opened Nov 13, 2023 by MQ-mengqing

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[RFC] Introducing __builtin_consistent to generate AArch64 BC.cond … backend:AArch64 backend:ARM backend:loongarch backend:m68k backend:MSP430 backend:RISC-V backend:Sparc backend:SPIR-V backend:WebAssembly backend:X86 clang:analysis clang:codegen

IR generation bugs: mangling, exceptions, etc.

clang:dataflow

Clang Dataflow Analysis framework - https://clang.llvm.org/docs/DataFlowAnalysisIntro.html

clang:frontend

Language frontend issues, e.g. anything involving "Sema"

clang:static analyzer clang

Clang issues not falling into any other category

llvm:ir llvm:SelectionDAG

SelectionDAGISel as well

llvm:transforms

#72175 opened Nov 14, 2023 by ilinpv

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Move ExpandMemCmp and MergeIcmp to the middle end backend:AArch64 backend:AMDGPU backend:ARM backend:loongarch backend:m68k backend:X86 llvm:transforms

#77370 opened Jan 8, 2024 by gbaraldi

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[LegalizeDAG][X86][AArch64][LoongArch] Freeze index when converting extract_elt/extract_subvector to load/store on stack. backend:AArch64 backend:loongarch backend:X86 llvm:SelectionDAG

SelectionDAGISel as well

#88985 opened Apr 16, 2024 by topperc

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[DAGCombiner] Set shift flags during visit. backend:AArch64 backend:AMDGPU backend:ARM backend:loongarch backend:PowerPC backend:RISC-V backend:SystemZ backend:WebAssembly backend:X86 llvm:SelectionDAG

SelectionDAGISel as well

#91239 opened May 6, 2024 by goldsteinn • Draft

[llvm][test] Fix filecheck annotation typos [1/n] backend:AArch64 backend:AMDGPU backend:ARM backend:Hexagon backend:loongarch backend:m68k backend:NVPTX backend:PowerPC backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 coroutines

C++20 coroutines

debuginfo llvm:analysis

Includes value tracking, cost tables and constant folding

llvm:binary-utilities llvm:instcombine

Covers the InstCombine, InstSimplify and AggressiveInstCombine passes

llvm:mc

Machine (object) code

llvm:transforms PGO

Profile Guided Optimizations

#93673 opened May 29, 2024 by klensy

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[llvm][test] Fix filecheck annotation typos [1.5/n] backend:AArch64 backend:ARM backend:Hexagon backend:loongarch backend:m68k backend:NVPTX backend:PowerPC backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 coroutines

C++20 coroutines

debuginfo llvm:analysis

Includes value tracking, cost tables and constant folding

llvm:binary-utilities llvm:instcombine

Covers the InstCombine, InstSimplify and AggressiveInstCombine passes

llvm:mc

Machine (object) code

llvm:transforms PGO

Profile Guided Optimizations

#94857 opened Jun 8, 2024 by klensy

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[llvm][test] Fix filecheck annotation typos [2/n] backend:AArch64 backend:AMDGPU backend:ARM backend:loongarch backend:m68k backend:NVPTX backend:PowerPC backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 coroutines

C++20 coroutines

debuginfo llvm:analysis

Includes value tracking, cost tables and constant folding

llvm:binary-utilities llvm:globalisel llvm:mc

Machine (object) code

llvm:transforms PGO

Profile Guided Optimizations

#95433 opened Jun 13, 2024 by klensy

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[clang] Improve diagnostics for constraints of inline asm (NFC) backend:AArch64 backend:AMDGPU backend:ARM backend:DirectX backend:loongarch backend:m68k backend:MSP430 backend:PowerPC backend:RISC-V backend:Sparc backend:SystemZ backend:WebAssembly clang:codegen

IR generation bugs: mangling, exceptions, etc.

clang:frontend

Language frontend issues, e.g. anything involving "Sema"

clang

Clang issues not falling into any other category

#96363 opened Jun 21, 2024 by e-kud

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[MachineCopyPropagation, Scheduler] Detect and fix suboptimal instruction order to enable optimizations backend:AArch64 backend:AMDGPU backend:loongarch backend:PowerPC backend:SystemZ backend:X86 llvm:globalisel llvm:regalloc

#98087 opened Jul 8, 2024 by spaits

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Optimize count leading ones if promoted type backend:AArch64 backend:loongarch backend:X86 llvm:globalisel llvm:SelectionDAG

SelectionDAGISel as well

llvm:transforms

#99591 opened Jul 19, 2024 by v01dXYZ

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AMDGPU: Drop and upgrade llvm.amdgcn.atomic.csub/cond.sub to atomicrmw backend:AArch64 backend:AMDGPU backend:ARM backend:Hexagon backend:loongarch backend:PowerPC backend:RISC-V backend:WebAssembly backend:X86 clang:openmp

OpenMP related changes to Clang

flang:openmp llvm:analysis

Includes value tracking, cost tables and constant folding

llvm:globalisel llvm:ir llvm:SelectionDAG

SelectionDAGISel as well

llvm:support llvm:transforms mlir:llvm mlir

#105553 opened Aug 21, 2024 by anjenner

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Clang tooling generated visibility macros for Clang backend:AArch64 backend:AMDGPU backend:ARM backend:Hexagon backend:loongarch backend:PowerPC backend:RISC-V backend:SystemZ backend:WebAssembly backend:X86 clang:analysis clang:codegen

IR generation bugs: mangling, exceptions, etc.

clang:dataflow

Clang Dataflow Analysis framework - https://clang.llvm.org/docs/DataFlowAnalysisIntro.html

clang:frontend

Language frontend issues, e.g. anything involving "Sema"

clang:modules

C++20 modules and Clang Header Modules

clang:openmp

OpenMP related changes to Clang

clang:static analyzer clang

Clang issues not falling into any other category

clang-format ClangIR

Anything related to the ClangIR project

HLSL

HLSL Language Support

xray

#109702 opened Sep 23, 2024 by fsfod

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[LoongArch][GlobalISel] Adding initial GlobalISel infrastructure backend:loongarch llvm:globalisel

#116005 opened Nov 13, 2024 by zhaoqi5

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[TRI] Remove reserved registers in getRegPressureSetLimit backend:AMDGPU backend:ARM backend:loongarch backend:NVPTX backend:PowerPC backend:X86 llvm:globalisel llvm:regalloc llvm:transforms tablegen

#118787 opened Dec 5, 2024 by wangpc-pp

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[IR][AsmParser] Revamp how floating-point literals work in LLVM IR. backend:AArch64 backend:AMDGPU backend:ARM backend:DirectX backend:Hexagon backend:loongarch backend:NVPTX backend:PowerPC backend:RISC-V backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86 clang:openmp

OpenMP related changes to Clang

clang

Clang issues not falling into any other category

debuginfo HLSL

HLSL Language Support

llvm:adt llvm:analysis

Includes value tracking, cost tables and constant folding

llvm:globalisel llvm:instcombine

Covers the InstCombine, InstSimplify and AggressiveInstCombine passes

llvm:ir llvm:support llvm:transforms

#121838 opened Jan 6, 2025 by jcranmer-intel

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DAG: Handle load in SimplifyDemandedVectorElts backend:AArch64 backend:AMDGPU backend:ARM backend:loongarch backend:MIPS backend:NVPTX backend:PowerPC backend:RISC-V backend:X86 llvm:SelectionDAG

SelectionDAGISel as well

#122671 opened Jan 13, 2025 by arsenm

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[LoongArch] Enable LoopTermFold Pass backend:loongarch llvm:transforms

#130737 opened Mar 11, 2025 by tangaac

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[CMake] Move common target dependencies into ${TARGET_LIBRARIES} backend:AArch64 backend:AMDGPU backend:ARC backend:ARM backend:CSKY backend:DirectX backend:Hexagon backend:Lanai backend:loongarch backend:m68k backend:MSP430 backend:NVPTX backend:PowerPC backend:Sparc backend:SPIR-V backend:SystemZ backend:WebAssembly backend:X86

#141271 opened May 23, 2025 by CBSears

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[LoongArch] Enable interleaved memory accesses by default backend:loongarch

#141555 opened May 27, 2025 by tangaac

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[llvm][LoongArch] Add reloc types for LA32R/LA32S backend:loongarch lld:ELF lld llvm:binary-utilities llvm:mc

Machine (object) code

#146499 opened Jul 1, 2025 by heiher • Draft

[SelectionDAG] Detect impossible conditions using known bits analysis backend:AArch64 backend:AMDGPU backend:ARM backend:Hexagon backend:loongarch backend:RISC-V backend:X86 llvm:SelectionDAG

SelectionDAGISel as well

#150715 opened Jul 25, 2025 by AZero13 • Draft

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