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Pull requests: llvm/llvm-project
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[DAG] Use known-bits when creating umulh/smulh. backend:AMDGPU backend:RISC-V backend:X86 llvm:SelectionDAG SelectionDAGISel as well
#160916 opened Sep 26, 2025 by davemgreen Loading… updated Dec 1, 2025
Avoid maxnum(sNaN, x) optimizations / folds backend:AMDGPU backend:ARM backend:X86 llvm:analysis Includes value tracking, cost tables and constant folding llvm:globalisel llvm:instcombine Covers the InstCombine, InstSimplify and AggressiveInstCombine passes llvm:SelectionDAG SelectionDAGISel as well llvm:transforms
#170181 opened Dec 1, 2025 by LewisCrawford Loading… updated Dec 1, 2025
X86: make VBMI2 funnel shifts use VSHLD/VSHRD for const splats backend:X86
#169401 opened Nov 24, 2025 by ArnavM3434 Loading… updated Dec 1, 2025
[X86][GlobalISel] Support globals in pic mode backend:X86 llvm:globalisel llvm:support mlgo
#170038 opened Nov 30, 2025 by e-kud Loading… updated Dec 1, 2025
[x86][AVX-VNNI] Fix VPDPWXXD Argument Types backend:X86 clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:headers Headers provided by Clang, e.g. for intrinsics compiler-rt:sanitizer llvm:ir llvm:transforms
#169456 opened Nov 25, 2025 by BaiXilin Loading… updated Dec 1, 2025
[CIR][X86] Add support for kunpck builtins backend:X86 clang Clang issues not falling into any other category ClangIR Anything related to the ClangIR project
#168757 opened Nov 19, 2025 by ahmednoursphinx Loading… updated Dec 1, 2025
[X86][Clang] Support constexpr evaluation of cvtpd2ps intrinsics backend:X86 clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:headers Headers provided by Clang, e.g. for intrinsics clang Clang issues not falling into any other category
#169980 opened Nov 29, 2025 by HamzaHassanain Loading… updated Dec 1, 2025
[Draft] Support save/restore point splitting in shrink-wrap backend:AArch64 backend:AMDGPU backend:ARM backend:Hexagon backend:NVPTX backend:PowerPC backend:RISC-V backend:WebAssembly backend:X86 debuginfo llvm:codegen llvm:globalisel tools:llvm-reduce
#119359 opened Dec 10, 2024 by enoskova-sc Loading… updated Dec 1, 2025
[RegisterCoalescer] The COPY with the implicit-def of super register is not coalescable. backend:X86 llvm:codegen llvm:regalloc
#169997 opened Nov 29, 2025 by dianqk Loading… updated Dec 1, 2025
[X86] Lower
minimum/maximum/minimumnum/maximumnum using bitwise operations backend:X86 #170069 opened Dec 1, 2025 by valadaptive Loading… updated Dec 1, 2025
[RegisterCoalescer] Don't commute two-address instructions which only define a subregister backend:SystemZ backend:X86 llvm:codegen llvm:regalloc
#169031 opened Nov 21, 2025 by KRM7 Loading… updated Dec 1, 2025
[TTI] Remove masked/gather-scatter/strided/expand-compress costing from TTIImpl backend:AArch64 backend:ARM backend:Hexagon backend:RISC-V backend:X86 llvm:analysis Includes value tracking, cost tables and constant folding
#169885 opened Nov 28, 2025 by arcbbb Loading… updated Dec 1, 2025
[aarch64] Mix the frame pointer with the stack cookie when protecting the stack backend:AArch64 backend:X86 llvm:codegen llvm:globalisel llvm:SelectionDAG SelectionDAGISel as well
#161114 opened Sep 29, 2025 by PanTao2 Loading… updated Dec 1, 2025
[RFC] Extend FASTCC to use up to 22 registers under APX backend:X86
#164638 opened Oct 22, 2025 by phoebewang Loading… updated Dec 1, 2025
[Clang][X86] Add tests for AVX512 integer comparison intrinsics to be used in constexpr backend:X86 clang Clang issues not falling into any other category
#169452 opened Nov 25, 2025 by shri-acha Loading… updated Nov 30, 2025
[HLSL][DXIL][SPRIV] Added WaveActiveProduct intrinsic #164385 backend:DirectX backend:SPIR-V backend:X86 clang:codegen IR generation bugs: mangling, exceptions, etc. clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:headers Headers provided by Clang, e.g. for intrinsics clang Clang issues not falling into any other category HLSL HLSL Language Support llvm:ir
#165109 opened Oct 25, 2025 by KungFuDonkey Loading… updated Nov 30, 2025
12 tasks done
[X86][GlobalISel] Support fp80 for G_FPTRUNC and G_FPEXT backend:X86 llvm:globalisel
#141611 opened May 27, 2025 by e-kud Loading… updated Nov 29, 2025
[X86] optimize saturating (masked) pack backend:X86
#169995 opened Nov 29, 2025 by folkertdev Loading… updated Nov 29, 2025
[StackProtector] Introduce stack-protect-refinement pass to remove unnecessary protections. backend:AArch64 backend:ARM backend:X86 clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' clang Clang issues not falling into any other category debuginfo llvm:globalisel llvm:transforms LTO Link time optimization (regular/full LTO or ThinLTO)
#150390 opened Jul 24, 2025 by Mermen Loading… updated Nov 29, 2025
[Clang][x86]: allow PCLMULQDQ intrinsics to be used in constexpr backend:X86 clang:bytecode Issues for the clang bytecode constexpr interpreter clang:frontend Language frontend issues, e.g. anything involving "Sema" clang Clang issues not falling into any other category
#169214 opened Nov 23, 2025 by ahmednoursphinx Loading… updated Nov 28, 2025
[X86][GlobalISel] Set Dst register correctly when narrowing G_ICMP backend:X86 llvm:globalisel
#169947 opened Nov 28, 2025 by e-kud Loading… updated Nov 28, 2025
[X86] optimize masked truncated saturating stores backend:X86
#169827 opened Nov 27, 2025 by folkertdev Loading… updated Nov 28, 2025
[X86] Add ISD::MULHS/MULHU v4i64/v8i64 lowering backend:X86 llvm:SelectionDAG SelectionDAGISel as well
[TTI] Use MemIntrinsicCostAttributes for getGatherScatterOpCost backend:AArch64 backend:ARM backend:Hexagon backend:RISC-V backend:X86 llvm:analysis Includes value tracking, cost tables and constant folding llvm:transforms vectorizers
#168650 opened Nov 19, 2025 by arcbbb Loading… updated Nov 28, 2025
[Codegen][NewPM] Explicitly Nest Passes in CodegenPassBuilder backend:AMDGPU backend:X86
#169867 opened Nov 28, 2025 by boomanaiden154 Loading… updated Nov 28, 2025
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