Questions tagged [dram]
Dynamic Random Access Memory and its use in retrocomputers.
30 questions
-2 votes
1 answer
257 views
Addressing on the Intel 1103 [closed]
I'm looking at a pinout of the 1103, a 1kb DRAM. It has address pins A0 through A8. 2^9 = 512 bits, not 1,024. So how did it address 1,024 bits?
- 22.4k
16 votes
8 answers
6k views
Why didn't CPUs multiplex address pins like DRAM?
An important innovation for dynamic RAM was multiplexing address lines, so a 2^N-bit chip only needs N/2 address pins, which helps keep cost down. Why didn't CPUs match this? Setting aside e.g. the ...
- 65.3k
2 votes
0 answers
281 views
Lower RAM module design for ZX Spectrum [closed]
While the upper DRAM chips for the ZX Spectrum (4164) are more stable and still accessable, the lower DRAM chips (4116) will become a critical component in the future. One of the solutions to this ...
- 121
9 votes
1 answer
1k views
Did any 8-bit computers use 16kx4 RAM chips?
An 8-bit computer wanting 64K of RAM, could most straightforwardly use eight 64kx1 DRAM chips (64kbit, 1 data line). The Commodore 64 initially did this, but in the mid-80s, the cost-reduced redesign ...
- 65.3k
9 votes
1 answer
616 views
Did the Vic-20 save money using static RAM?
The unexpanded Vic-20 had 5K of RAM. This was quite small even by 1981 standards, but it was trying to be cheap enough for consumers to buy, and it succeeded, selling over 2 million units. One reason ...
- 65.3k
16 votes
1 answer
3k views
Was any DRAM ever slower than 2 MHz?
4096-bit dynamic RAM chips were commonly used for main memory in microcomputers of the late seventies. According to the Mostek MK4096 datasheet, it was sold in various speed grades, with the slowest ...
- 65.3k
8 votes
1 answer
1k views
How does the VIC-II/CPU memory access work on the C64?
As a programmer I knew that on the C64 the CPU got the bus in the high phase of PHI2 and the VIC-II got it in the low phase and also stole extra high phases when required. However, it wasn't until ...
- 263
4 votes
1 answer
365 views
Does the Apple II's non-linear frame buffer layout help DRAM refresh?
The Apple II uses non-linear frame buffers for text and graphics. Rather than storing each line in sequence at lines 0-23: $400, $428, $450, $480,¹ ..., $7D0 it stores them at lines 0- 7: $400, $...
- 29.5k