Is there a way to run the GCC preprocessor, but only for user-defined macros?
I have a few one-liners and some #ifdef, etc. conditionals, and I want to see what my code looks like when just those are expanded.
As it is, the includes get expanded, my fprintf(stderr)s turn into fprintf(((__getreeent())->_stderr), etc.
Call cpp directly, e.g.
$ cat >foo.c <<EOF #define FOO #ifdef FOO foo is defined #else foo is not defined #endif EOF $ cpp foo.c # 1 "foo.c" # 1 "<built-in>" # 1 "<command-line>" # 1 "foo.c" foo is defined Of course, if you include any headers then those will be included in the output. One way to avoid that might be to just grep -v out the lines with #includes (or perhaps just ones with #include < and allow #include "). Or you could specify the -nostdinc option to remove just standard includes (but possibly leave in local libraries unless you specify include paths so that they won't be found) - this would warn about missing headers, though.
Edit: Or use the preprocessor itself to make the inclusion of headers conditional, wrap them in something like #ifndef TESTING_PREPROCESSOR and use -DTESTING_PREPROCESSOR.
#include lines in an #if section is one of those simple yet effective things that might not occur to someone until a bunch of other effort was wasted trying other more complicated things.cpp -nostdinc program.c One may use tools like unifdef, unifdefall — remove preprocessor conditionals from code
gcc -E inputfile.c > outputfile.c outputfile.c will have your preprocessed code, but all macros will be expanded.
I find this trick very useful when debugging compilation of large systems with tons of includes, compiler flags, and makefile variables. It will expose include files that don't have header guards, and a bunch of other problems too.
