0

I'm using the following Makefile with GNU make. As you can see, I prepended an @ to the lines which call g++, to prevent them from being echo'ed to the console.

However, the g++ commands are still echo'ed. Does anyone know how to prevent this?

I have an almost identical Makefile for a C project, and it works correctly..

Thanks!

# for portability. SHELL = /bin/sh CXX = g++ # compile flags. CXXFLAGS = -g -pedantic -Wall -Wextra -Werror -march=native -O2 \ -fwhole-program -flto TARGET = program MANPAGE = program.8 SOURCES = $(shell echo src/*.cpp) HEADERS = $(shell echo src/*.h) OBJECTS = $(SOURCES:.cpp=.o) VERSION = 0.1-beta # installation paths. PREFIX = $(DESTDIR)/usr/local BINDIR = $(PREFIX)/sbin MANDIR = $(PREFIX)/share/man/man8 # standard targets. all: $(TARGET) $(TARGET): $(OBJECTS) @echo "[LD] $@" @$(CXX) $(CXXFLAGS) -o $(TARGET) $(OBJECTS) man: @(cd man; gzip < $(MANPAGE) > $(MANPAGE).gz) install: $(TARGET) man @install -D -m 755 $(TARGET) $(BINDIR)/$(TARGET) @install -D -m 744 man/$(MANPAGE).gz $(MANDIR)/$(MANPAGE).gz install-strip: $(TARGET) man @install -D -m 755 -s $(TARGET) $(BINDIR)/$(TARGET) @install -D -m 744 man/$(MANPAGE).gz $(MANDIR)/$(MANPAGE).gz uninstall: @$(RM) $(BINDIR)/$(TARGET) @$(RM) $(MANDIR)/$(MANPAGE).gz clean: @$(RM) $(OBJECTS) distclean: clean @$(RM) $(TARGET) @(cd man; $(RM) $(MANPAGE).gz) %.o: %.cpp $(HEADERS) @echo "[CXX] $<" @$(CXX) $(CXXFLAGS) -c -o $@ $< .PHONY: all man install install-strip uninstall clean distclean
Improve this question
3
  • Do you have any src/*.h files? If you do not, built-in rule for .o files will take precedence. Using wildcard instead of shell should solve that. Commented Dec 7, 2014 at 16:26
  • Using make -s or adding a line .SILENT: would both suppress all the output from make. However, the leading @ markers should do that too. I personally don't like makefiles that don't show, or have a mechanism to show, exactly what is being executed because it is hard to debug when something goes wrong. That being the case, I don't use either -s or .SILENT: on a regular basis. Commented Dec 7, 2014 at 16:43
  • Thanks @Banthar, I was testing the Makefile without any headers! Commented Dec 9, 2014 at 21:56

1 Answer 1

Reset to default
2

It would really help if you'd provided the actual command you run and a sample of the incorrect output you see (plus a few lines of context before and after).

Do you see both the [CXX] src/xxx.cpp and the compile line? There's no way that can happen given the makefile you've provided. If you see only the compile line, that means that make is deciding to not use your pattern rule and is instead using its own build-in pattern rule. You'll need to use make -d to see why make gives up on your pattern rule.

As an aside, you can use $(wildcard src/*.cpp) rather than $(shell echo src/*.cpp), and you should always use := not = when assigning the results of a shell function (or wildcard or any function which is computationally expensive) unless there's a specific reason to defer expansion.

Improve this answer
Sign up to request clarification or add additional context in comments.

Comments

Start asking to get answers

Find the answer to your question by asking.

Ask question

Explore related questions

See similar questions with these tags.