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I have a quite large make file project (c++) which depending on environment variables build certain files and ignores other in my source directory.

I want to generate a list of files which are actually used in the make process with the current environmental settings. I.e. I want to get all the source files compiled and all header files included printed.

The reason I want to do this is to be able to add all file to a qtcreator project and thus only get relevant files in my project.

I know I have done this before some how but now I can't seem to find it anywhere on the internet.

EDIT: I'm pretty sure this should be possible without editing the makefile and that would be preferable in this case due to the complexity of the make system. There is a lot of makefiles involved in the project.

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  • Under linux you could use strace to intercept all files accessed, under windows that would be procmon.exe. Commented May 7, 2015 at 9:07

2 Answers 2

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Make in itself does not have a way to do this.

Typically, adding a target called "list_files" or something like that that does:

 .phony: list_files list_files: echo $SOURCES 

Adjust to suit the variables that contains your list of sources, of course.

To list included files in a particular file, you need to use:

 .phony: list_includes list_includes: ${CXX} -MM $SOURCES 

(This will not list the headers in system files - use single M option -M to give a complete list of every file included, but that is typically not useful and will make a very long list)

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Comments

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"make" itself prints all commands it executes. Just grep them with "cpp" and "h" filters:

make |grep -o -e "\w*\.cpp" -e "\w*\.h" 

The -o parameter prints only the matching parts, not the whole lines. It is needed to print the matching source file names.

3 Comments

Unfortunately the commands printed by make does not really contain any file names in my case.
Explore if it's possible to show the executed commands in your case. For example, in native Android compilation, "make" doesn't print the whole command, but only the compiled file names. Using make showcommands prints the whole commands.
In makefiles generated by autotools, you can use the verbose parameter: make V=1. Here is a question about showing commands in make: stackoverflow.com/questions/5820303/…

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