Suppose say a computer system uses 16-bit memory addresses. It has a 2K-byte cache organized in a 2-way set associative manner with 64 bytes per cache block. Assume that the size of each memory word is 1 byte. $$$$ It means that, I have a block of 64 words. Hence to address those any of these words I need the 6 offset bits. $$$$ In my cache I have 32 Blocks, as: $$ \frac {2048} {64} = 32 Blocks$$ Also in my main memory I have: $$\frac{65536}{64}= 1024 Blocks$$ Hence every block in cache has 32 blocks of main memory possible to be mapped.Since it is 2Way Set Associative, I can say 16 Sets are needed (32/2) for which 4 bits (Index Bits) are needed. The new incoming blocks can be anywhere within the mapped set. Set, and offset is identified for the data. How will the tag bits now help us? Since the block can be placed anywhere within that set. My textbook says it takes 6 bits for the Tag. How will it help us and why?
- $\begingroup$ Is How will 6 bits for the Tag help us? your question, or should it be Why not more tag bits? or Aren't 5 tag bits enough?? $\endgroup$greybeard– greybeard2024-04-08 13:44:10 +00:00Commented Apr 8, 2024 at 13:44
- $\begingroup$ @greybeard How will 6 bits help us $\endgroup$Marc Newsom– Marc Newsom2024-04-09 15:39:37 +00:00Commented Apr 9, 2024 at 15:39
1 Answer
You correctly stated 4 bits will be needed to select the set , and 6 bits for offset within a cache line.
Of the 16-bit memory address, 10 are accounted for; remaining bits there are 6.
With the set selected, there are four possibilities: the address is…
1) …not cached 2) …mapped to line 0 3) …mapped to line 1
The same source stating 6 bits for the Tag should have explained
cache tags: information stored per block/line to tell hit from miss.
In the most basic form, this is just the address bits beyond offset and set address.
The idea is that all valid tags within the set selected concurrently get compared to the remaining address bits: none ("miss") or one should be equal.
(There needs to be some way to tell valid entry from invalid; one possibility without extra bits is to declare one tag bit pattern to mean invalid.)
en.wikipedia hyperlinks Garcia, Sat: The Basics of Caches
