Questions tagged [cache]
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40 questions
0 votes
1 answer
50 views
Understanding Clean Chains in Blame Graph Described in the Predictive Marker Algorithm (Lykouris & Vassilvitskii)
Can someone explain to me how clean chains work in this paper? Here's the paper: Competitive caching with machine learned advice by Lykouris & Vassilvitskii I'm trying to implement the predictive ...
0 votes
3 answers
141 views
Cache Page vs. Memory Page
I'm learning about caching, and currently have some degree of familiarity with main memory and paging. While reading this this Intel paper, I'm confused about the term "cache pages". I know ...
- 101
0 votes
0 answers
28 views
Worst-case scenario D-cache miss numbers: Why 4?
I am trying to solve this old exam question from a course that I am taking: Consider the following 32-bit MIPS assembly code. ...
- 31
0 votes
1 answer
148 views
How do tag bits help us in 2 Way Set Associative Cache?
Suppose say a computer system uses 16-bit memory addresses. It has a 2K-byte cache organized in a 2-way set associative manner with 64 bytes per cache block. Assume that the size of each memory word ...
2 votes
1 answer
79 views
Problem with cache and memory from university class
In my university class, I received this homework assignment on computer architecture, but I don't know how to solve it. I already know that the correct answer is 0, but I don't understand why. Could ...
- 21
2 votes
1 answer
83 views
Assosciative mapping algorithm
I have been studying the assosciative mapping in a cache.Every line in a cache has a unique address which is made of:the index and the offset bits which give the the cache set and the cache line and ...
- 153
0 votes
2 answers
2k views
How to calculate the size of main memory if the cache is 4-way set associative memory, cache memory size is 256KB and number of tag bits is 8
I'm trying to calculate the main memory size, and the only information given is the size of the cache, which is 256 KB, and the number of tag bits, which is 8. Cache is a 4-way set associative memory. ...
4 votes
1 answer
164 views
How does caching, paging, virtual memory, and OS all tie together for UNIX copy-on-write?
In my OS course, the instructor mentioned the following: In UNIX if a parent process creates a new child ("fork") then the child is an exact duplicate of the parent. This means its memory ...
- 143
0 votes
0 answers
101 views
Memory Hierarchy Mappings to real world
This article from IBM (link) talks about Memory hierarchy in its actual hardware parts. NUMA While operating systems present memory to the running applications as a unified space, modern large ...
1 vote
2 answers
242 views
Does cache hit time include both time to read a cache and time to write a cache?
For example, if it takes 1 cycle to read the cache and 3 cycles to write the cache, is the hit time equal to 4 cycles? Also, does this vary based on whether the cache is an instruction cache or a data ...
- 11
-1 votes
1 answer
3k views
How to determine tag, index and offset size in a two-way associative cache
How to determine tag, index and offset size in a two-way associative cache with a 1MB two-way set associative cache with 8 byte blocks
- 1
1 vote
0 answers
60 views
How to decide row / column strides for a loop over a matrix get these cache hit rates?
Given CPU with: L1 cache: 4-ways, block size = 32 bytes , cache size = 64KB , LRU (Cache replacement policy). L2 cache: 2-ways, block size = 32 bytes , cache size = 512KB , LRU (Cache replacement ...
2 votes
2 answers
197 views
Resolving a dependency graph with insufficient resources to store all states
A common way to resolve a dependency graph is to compute an execution order, and then execute each stage in turn - storing and fetching the resources as necessary. In this example, when executing ...
- 121
1 vote
2 answers
2k views
RAM access time vs cycle time
About Random Access Memory (SRAM and DRAM), if multiple read or write operation take place, many books calculate the average access time of those operations. Given the definition of access time, I ...
- 367
2 votes
1 answer
200 views
How does software prefetching work with in order processors?
From prof. Onut Mutlu's slides on prefetching, this example has been shown as software prefetching: ...
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